mirror of
https://github.com/qmk/qmk_firmware.git
synced 2024-11-22 03:19:24 +00:00
199 lines
4.8 KiB
C
199 lines
4.8 KiB
C
/* Copyright 2017 Jason Williams
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* Copyright 2018 Jack Humbert
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* Copyright 2018 Yiancar
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* Copyright 2020 MelGeek
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* Copyright 2021 MasterSpoon
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#pragma once
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// This is a 7-bit address, that gets left-shifted and bit 0
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// set to 0 for write, 1 for read (as per I2C protocol)
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// The address will vary depending on your wiring:
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// 00 <-> GND
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// 01 <-> SCL
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// 10 <-> SDA
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// 11 <-> VCC
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// ADDR1 represents A1:A0 of the 7-bit address.
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// ADDR2 represents A3:A2 of the 7-bit address.
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// The result is: 0b110(ADDR2)(ADDR1)
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#ifndef DRIVER_ADDR_1
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# define DRIVER_ADDR_1 0b1100000
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#endif
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// Set defaults for Spread Spectrum Register
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#ifndef ISSI_SSR_1
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# define ISSI_SSR_1 0x00
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#endif
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#ifndef ISSI_SSR_2
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# define ISSI_SSR_2 0x00
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#endif
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#ifndef ISSI_SSR_3
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# define ISSI_SSR_3 0x00
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#endif
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#ifndef ISSI_SSR_4
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# define ISSI_SSR_4 0x00
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#endif
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// Command Registers
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#define ISSI_COMMANDREGISTER_WRITELOCK 0xFE
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#define ISSI_COMMANDREGISTER 0xFD
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#define ISSI_IDREGISTER 0xFC
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#define ISSI_REGISTER_UNLOCK 0xC5
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// Response Registers
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#define ISSI_PAGE_PWM 0x00
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#define ISSI_PAGE_SCALING 0x01
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#define ISSI_PAGE_FUNCTION 0x01
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// Registers under Function Register
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#define ISSI_REG_CONFIGURATION 0x50
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#define ISSI_REG_GLOBALCURRENT 0x51
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#define ISSI_REG_PULLDOWNUP 0x52
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#define ISSI_REG_TEMP 0x5F
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#define ISSI_REG_SSR 0x60
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#define ISSI_REG_RESET 0x8F
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#define ISSI_REG_PWM_ENABLE 0xE0
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#define ISSI_REG_PWM_SET 0xE2
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// Set defaults for Function Registers
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#ifndef ISSI_CONFIGURATION
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# define ISSI_CONFIGURATION 0x01
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#endif
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#ifndef ISSI_GLOBALCURRENT
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# define ISSI_GLOBALCURRENT 0xFF
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#endif
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#ifndef ISSI_PULLDOWNUP
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# define ISSI_PULLDOWNUP 0x33
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#endif
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#ifndef ISSI_TEMP
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# define ISSI_TEMP 0x00
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#endif
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#ifndef ISSI_PWM_ENABLE
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# define ISSI_PWM_ENABLE 0x00
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#endif
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#ifndef ISSI_PWM_SET
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# define ISSI_PWM_SET 0x00
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#endif
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// Set defaults for Scaling registers
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#ifndef ISSI_SCAL_RED
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# define ISSI_SCAL_RED 0xFF
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#endif
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#ifndef ISSI_SCAL_BLUE
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# define ISSI_SCAL_BLUE 0xFF
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#endif
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#ifndef ISSI_SCAL_GREEN
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# define ISSI_SCAL_GREEN 0xFF
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#endif
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#define ISSI_SCAL_RED_OFF 0x00
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#define ISSI_SCAL_GREEN_OFF 0x00
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#define ISSI_SCAL_BLUE_OFF 0x00
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#ifndef ISSI_SCAL_LED
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# define ISSI_SCAL_LED 0xFF
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#endif
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#define ISSI_SCAL_LED_OFF 0x00
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// Set buffer sizes
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#define ISSI_MAX_LEDS 72
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#define ISSI_SCALING_SIZE 72
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#define ISSI_PWM_TRF_SIZE 18
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#define ISSI_SCALING_TRF_SIZE 18
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// Location of 1st bit for PWM and Scaling registers
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#define ISSI_PWM_REG_1ST 0x01
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#define ISSI_SCL_REG_1ST 0x01
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// Map CS SW locations to order in PWM / Scaling buffers
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// This matches the ORDER in the Datasheet Register not the POSITION
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// It will always count from 0x00 to (ISSI_MAX_LEDS - 1)
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#define CS1_SW1 0x00
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#define CS2_SW1 0x01
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#define CS3_SW1 0x02
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#define CS4_SW1 0x03
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#define CS5_SW1 0x04
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#define CS6_SW1 0x05
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#define CS7_SW1 0x06
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#define CS8_SW1 0x07
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#define CS9_SW1 0x08
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#define CS10_SW1 0x09
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#define CS11_SW1 0x0A
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#define CS12_SW1 0x0B
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#define CS13_SW1 0x0C
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#define CS14_SW1 0x0D
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#define CS15_SW1 0x0E
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#define CS16_SW1 0x0F
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#define CS17_SW1 0x10
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#define CS18_SW1 0x11
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#define CS1_SW2 0x12
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#define CS2_SW2 0x13
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#define CS3_SW2 0x14
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#define CS4_SW2 0x15
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#define CS5_SW2 0x16
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#define CS6_SW2 0x17
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#define CS7_SW2 0x18
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#define CS8_SW2 0x19
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#define CS9_SW2 0x1A
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#define CS10_SW2 0x1B
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#define CS11_SW2 0x1C
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#define CS12_SW2 0x1D
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#define CS13_SW2 0x1E
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#define CS14_SW2 0x1F
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#define CS15_SW2 0x20
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#define CS16_SW2 0x21
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#define CS17_SW2 0x22
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#define CS18_SW2 0x23
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#define CS1_SW3 0x24
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#define CS2_SW3 0x25
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#define CS3_SW3 0x26
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#define CS4_SW3 0x27
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#define CS5_SW3 0x28
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#define CS6_SW3 0x29
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#define CS7_SW3 0x2A
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#define CS8_SW3 0x2B
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#define CS9_SW3 0x2C
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#define CS10_SW3 0x2D
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#define CS11_SW3 0x2E
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#define CS12_SW3 0x2F
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#define CS13_SW3 0x30
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#define CS14_SW3 0x31
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#define CS15_SW3 0x32
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#define CS16_SW3 0x33
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#define CS17_SW3 0x34
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#define CS18_SW3 0x35
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#define CS1_SW4 0x36
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#define CS2_SW4 0x37
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#define CS3_SW4 0x38
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#define CS4_SW4 0x39
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#define CS5_SW4 0x3A
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#define CS6_SW4 0x3B
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#define CS7_SW4 0x3C
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#define CS8_SW4 0x3D
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#define CS9_SW4 0x3E
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#define CS10_SW4 0x3F
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#define CS11_SW4 0x40
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#define CS12_SW4 0x41
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#define CS13_SW4 0x42
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#define CS14_SW4 0x43
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#define CS15_SW4 0x44
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#define CS16_SW4 0x45
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#define CS17_SW4 0x46
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#define CS18_SW4 0x47
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