mirror of
https://github.com/qmk/qmk_firmware.git
synced 2024-11-26 21:26:46 +00:00
acd3e79add
* Nk65 initial commit
* Minor fix for compatibility
* Make everything pretty
* Update keyboards/nk65/config.h
Co-Authored-By: noroadsleft <18669334+noroadsleft@users.noreply.github.com>
* Update keyboards/nk65/readme.md
Co-Authored-By: noroadsleft <18669334+noroadsleft@users.noreply.github.com>
* Chmod Dummy
* Update getting_started_introduction.md
* Revert "Update getting_started_introduction.md"
This reverts commit daf446acf7.
1188 lines
71 KiB
C
Executable File
1188 lines
71 KiB
C
Executable File
/*
|
|
ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
|
|
|
|
Licensed under the Apache License, Version 2.0 (the "License");
|
|
you may not use this file except in compliance with the License.
|
|
You may obtain a copy of the License at
|
|
|
|
http://www.apache.org/licenses/LICENSE-2.0
|
|
|
|
Unless required by applicable law or agreed to in writing, software
|
|
distributed under the License is distributed on an "AS IS" BASIS,
|
|
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
|
See the License for the specific language governing permissions and
|
|
limitations under the License.
|
|
*/
|
|
|
|
#ifndef _BOARD_H_
|
|
#define _BOARD_H_
|
|
|
|
/*
|
|
* Setup for NK65 Keyboard
|
|
*/
|
|
|
|
/*
|
|
* Board identifier.
|
|
*/
|
|
#define BOARD_GENERIC_STM32_F303XC
|
|
#define BOARD_NAME "NK65 PCB"
|
|
|
|
/*
|
|
* Board oscillators-related settings.
|
|
* NOTE: LSE not fitted.
|
|
*/
|
|
#if !defined(STM32_LSECLK)
|
|
#define STM32_LSECLK 0U
|
|
#endif
|
|
|
|
#define STM32_LSEDRV (3U << 3U)
|
|
|
|
#if !defined(STM32_HSECLK)
|
|
#define STM32_HSECLK 8000000U
|
|
#endif
|
|
|
|
// #define STM32_HSE_BYPASS
|
|
|
|
/*
|
|
* MCU type as defined in the ST header.
|
|
*/
|
|
#define STM32F303xC
|
|
|
|
/*
|
|
* IO pins assignments.
|
|
*/
|
|
#define GPIOA_PIN0 0U
|
|
#define GPIOA_PIN1 1U
|
|
#define GPIOA_PIN2 2U
|
|
#define GPIOA_PIN3 3U
|
|
#define GPIOA_PIN4 4U
|
|
#define GPIOA_PIN5 5U
|
|
#define GPIOA_PIN6 6U
|
|
#define GPIOA_PIN7 7U
|
|
#define GPIOA_PIN8 8U
|
|
#define GPIOA_PIN9 9U
|
|
#define GPIOA_PIN10 10U
|
|
#define GPIOA_USB_DM 11U
|
|
#define GPIOA_USB_DP 12U
|
|
#define GPIOA_SWDIO 13U
|
|
#define GPIOA_SWCLK 14U
|
|
#define GPIOA_PIN15 15U
|
|
|
|
#define GPIOB_PIN0 0U
|
|
#define GPIOB_PIN1 1U
|
|
#define GPIOB_PIN2 2U
|
|
#define GPIOB_PIN3 3U
|
|
#define GPIOB_PIN4 4U
|
|
#define GPIOB_PIN5 5U
|
|
#define GPIOB_PIN6 6U
|
|
#define GPIOB_PIN7 7U
|
|
#define GPIOB_PIN8 8U
|
|
#define GPIOB_PIN9 9U
|
|
#define GPIOB_PIN10 10U
|
|
#define GPIOB_PIN11 11U
|
|
#define GPIOB_PIN12 12U
|
|
#define GPIOB_PIN13 13U
|
|
#define GPIOB_PIN14 14U
|
|
#define GPIOB_PIN15 15U
|
|
|
|
#define GPIOC_PIN0 0U
|
|
#define GPIOC_PIN1 1U
|
|
#define GPIOC_PIN2 2U
|
|
#define GPIOC_PIN3 3U
|
|
#define GPIOC_PIN4 4U
|
|
#define GPIOC_PIN5 5U
|
|
#define GPIOC_PIN6 6U
|
|
#define GPIOC_PIN7 7U
|
|
#define GPIOC_PIN8 8U
|
|
#define GPIOC_PIN9 9U
|
|
#define GPIOC_PIN10 10U
|
|
#define GPIOC_PIN11 11U
|
|
#define GPIOC_PIN12 12U
|
|
#define GPIOC_PIN13 13U
|
|
#define GPIOC_PIN14 14U
|
|
#define GPIOC_PIN15 15U
|
|
|
|
#define GPIOD_PIN0 0U
|
|
#define GPIOD_PIN1 1U
|
|
#define GPIOD_PIN2 2U
|
|
#define GPIOD_PIN3 3U
|
|
#define GPIOD_PIN4 4U
|
|
#define GPIOD_PIN5 5U
|
|
#define GPIOD_PIN6 6U
|
|
#define GPIOD_PIN7 7U
|
|
#define GPIOD_PIN8 8U
|
|
#define GPIOD_PIN9 9U
|
|
#define GPIOD_PIN10 10U
|
|
#define GPIOD_PIN11 11U
|
|
#define GPIOD_PIN12 12U
|
|
#define GPIOD_PIN13 13U
|
|
#define GPIOD_PIN14 14U
|
|
#define GPIOD_PIN15 15U
|
|
|
|
#define GPIOE_PIN0 0U
|
|
#define GPIOE_PIN1 1U
|
|
#define GPIOE_PIN2 2U
|
|
#define GPIOE_PIN3 3U
|
|
#define GPIOE_PIN4 4U
|
|
#define GPIOE_PIN5 5U
|
|
#define GPIOE_PIN6 6U
|
|
#define GPIOE_PIN7 7U
|
|
#define GPIOE_PIN8 8U
|
|
#define GPIOE_PIN9 9U
|
|
#define GPIOE_PIN10 10U
|
|
#define GPIOE_PIN11 11U
|
|
#define GPIOE_PIN12 12U
|
|
#define GPIOE_PIN13 13U
|
|
#define GPIOE_PIN14 14U
|
|
#define GPIOE_PIN15 15U
|
|
|
|
#define GPIOF_I2C2_SDA 0U
|
|
#define GPIOF_I2C2_SCL 1U
|
|
#define GPIOF_PIN2 2U
|
|
#define GPIOF_PIN3 3U
|
|
#define GPIOF_PIN4 4U
|
|
#define GPIOF_PIN5 5U
|
|
#define GPIOF_PIN6 6U
|
|
#define GPIOF_PIN7 7U
|
|
#define GPIOF_PIN8 8U
|
|
#define GPIOF_PIN9 9U
|
|
#define GPIOF_PIN10 10U
|
|
#define GPIOF_PIN11 11U
|
|
#define GPIOF_PIN12 12U
|
|
#define GPIOF_PIN13 13U
|
|
#define GPIOF_PIN14 14U
|
|
#define GPIOF_PIN15 15U
|
|
|
|
#define GPIOG_PIN0 0U
|
|
#define GPIOG_PIN1 1U
|
|
#define GPIOG_PIN2 2U
|
|
#define GPIOG_PIN3 3U
|
|
#define GPIOG_PIN4 4U
|
|
#define GPIOG_PIN5 5U
|
|
#define GPIOG_PIN6 6U
|
|
#define GPIOG_PIN7 7U
|
|
#define GPIOG_PIN8 8U
|
|
#define GPIOG_PIN9 9U
|
|
#define GPIOG_PIN10 10U
|
|
#define GPIOG_PIN11 11U
|
|
#define GPIOG_PIN12 12U
|
|
#define GPIOG_PIN13 13U
|
|
#define GPIOG_PIN14 14U
|
|
#define GPIOG_PIN15 15U
|
|
|
|
#define GPIOH_PIN0 0U
|
|
#define GPIOH_PIN1 1U
|
|
#define GPIOH_PIN2 2U
|
|
#define GPIOH_PIN3 3U
|
|
#define GPIOH_PIN4 4U
|
|
#define GPIOH_PIN5 5U
|
|
#define GPIOH_PIN6 6U
|
|
#define GPIOH_PIN7 7U
|
|
#define GPIOH_PIN8 8U
|
|
#define GPIOH_PIN9 9U
|
|
#define GPIOH_PIN10 10U
|
|
#define GPIOH_PIN11 11U
|
|
#define GPIOH_PIN12 12U
|
|
#define GPIOH_PIN13 13U
|
|
#define GPIOH_PIN14 14U
|
|
#define GPIOH_PIN15 15U
|
|
|
|
/*
|
|
* IO lines assignments.
|
|
*/
|
|
#define LINE_L3GD20_SDI PAL_LINE(GPIOA, 7U)
|
|
#define LINE_USB_DM PAL_LINE(GPIOA, 11U)
|
|
#define LINE_USB_DP PAL_LINE(GPIOA, 12U)
|
|
#define LINE_SWDIO PAL_LINE(GPIOA, 13U)
|
|
#define LINE_SWCLK PAL_LINE(GPIOA, 14U)
|
|
|
|
#define LINE_PIN6 PAL_LINE(GPIOF, 0U)
|
|
#define LINE_PIN7 PAL_LINE(GPIOF, 1U)
|
|
|
|
#define LINE_CAPS_LOCK PAL_LINE(GPIOB, 7U)
|
|
|
|
|
|
/*
|
|
* I/O ports initial setup, this configuration is established soon after reset
|
|
* in the initialization code.
|
|
* Please refer to the STM32 Reference Manual for details.
|
|
*/
|
|
#define PIN_MODE_INPUT(n) (0U << ((n) * 2U))
|
|
#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U))
|
|
#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U))
|
|
#define PIN_MODE_ANALOG(n) (3U << ((n) * 2U))
|
|
#define PIN_ODR_LOW(n) (0U << (n))
|
|
#define PIN_ODR_HIGH(n) (1U << (n))
|
|
#define PIN_OTYPE_PUSHPULL(n) (0U << (n))
|
|
#define PIN_OTYPE_OPENDRAIN(n) (1U << (n))
|
|
#define PIN_OSPEED_VERYLOW(n) (0U << ((n) * 2U))
|
|
#define PIN_OSPEED_LOW(n) (1U << ((n) * 2U))
|
|
#define PIN_OSPEED_MEDIUM(n) (2U << ((n) * 2U))
|
|
#define PIN_OSPEED_HIGH(n) (3U << ((n) * 2U))
|
|
#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U))
|
|
#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U))
|
|
#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U))
|
|
#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U))
|
|
|
|
/*
|
|
* GPIOA setup:
|
|
*
|
|
* PA0 - NC
|
|
* PA1 - NC
|
|
* PA2 - COL1
|
|
* PA3 - COL2
|
|
* PA4 - SPEAKER1
|
|
* PA5 - SPEAKER2
|
|
* PA6 - COL3
|
|
* PA7 - COL8
|
|
* PA8 - COL6
|
|
* PA9 - COL7
|
|
* PA10 - ROW5
|
|
* PA11 - USB_DM (alternate 14).
|
|
* PA12 - USB_DP (alternate 14).
|
|
* PA13 - SWDIO (alternate 0).
|
|
* PA14 - SWCLK (alternate 0).
|
|
* PA15 - ROW4
|
|
*/
|
|
#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_PIN0) | \
|
|
PIN_MODE_ALTERNATE(GPIOA_PIN1) | \
|
|
PIN_MODE_INPUT(GPIOA_PIN2) | \
|
|
PIN_MODE_INPUT(GPIOA_PIN3) | \
|
|
PIN_MODE_INPUT(GPIOA_PIN4) | \
|
|
PIN_MODE_INPUT(GPIOA_PIN5) | \
|
|
PIN_MODE_INPUT(GPIOA_PIN6) | \
|
|
PIN_MODE_INPUT(GPIOA_PIN7) | \
|
|
PIN_MODE_INPUT(GPIOA_PIN8) | \
|
|
PIN_MODE_INPUT(GPIOA_PIN9) | \
|
|
PIN_MODE_INPUT(GPIOA_PIN10) | \
|
|
PIN_MODE_ALTERNATE(GPIOA_USB_DM) | \
|
|
PIN_MODE_ALTERNATE(GPIOA_USB_DP) | \
|
|
PIN_MODE_ALTERNATE(GPIOA_SWDIO) | \
|
|
PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \
|
|
PIN_MODE_INPUT(GPIOA_PIN15))
|
|
#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_PIN0) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOA_PIN1) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOA_PIN2) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOA_PIN3) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOA_PIN4) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOA_PIN5) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOA_PIN6) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOA_PIN7) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOA_PIN8) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOA_PIN9) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOA_PIN10) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOA_USB_DM) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOA_USB_DP) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOA_PIN15))
|
|
#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOA_PIN0) | \
|
|
PIN_OSPEED_HIGH(GPIOA_PIN1) | \
|
|
PIN_OSPEED_VERYLOW(GPIOA_PIN2) | \
|
|
PIN_OSPEED_VERYLOW(GPIOA_PIN3) | \
|
|
PIN_OSPEED_VERYLOW(GPIOA_PIN4) | \
|
|
PIN_OSPEED_VERYLOW(GPIOA_PIN5) | \
|
|
PIN_OSPEED_VERYLOW(GPIOA_PIN6) | \
|
|
PIN_OSPEED_VERYLOW(GPIOA_PIN7) | \
|
|
PIN_OSPEED_VERYLOW(GPIOA_PIN8) | \
|
|
PIN_OSPEED_VERYLOW(GPIOA_PIN9) | \
|
|
PIN_OSPEED_VERYLOW(GPIOA_PIN10) | \
|
|
PIN_OSPEED_HIGH(GPIOA_USB_DM) | \
|
|
PIN_OSPEED_VERYLOW(GPIOA_USB_DP) | \
|
|
PIN_OSPEED_HIGH(GPIOA_SWDIO) | \
|
|
PIN_OSPEED_HIGH(GPIOA_SWCLK) | \
|
|
PIN_OSPEED_VERYLOW(GPIOA_PIN15))
|
|
#define VAL_GPIOA_PUPDR (PIN_PUPDR_FLOATING(GPIOA_PIN0) | \
|
|
PIN_PUPDR_FLOATING(GPIOA_PIN1) | \
|
|
PIN_PUPDR_PULLUP(GPIOA_PIN2) | \
|
|
PIN_PUPDR_PULLUP(GPIOA_PIN3) | \
|
|
PIN_PUPDR_PULLUP(GPIOA_PIN4) | \
|
|
PIN_PUPDR_PULLUP(GPIOA_PIN5) | \
|
|
PIN_PUPDR_PULLUP(GPIOA_PIN6) | \
|
|
PIN_PUPDR_FLOATING(GPIOA_PIN7) | \
|
|
PIN_PUPDR_PULLUP(GPIOA_PIN8) | \
|
|
PIN_PUPDR_PULLUP(GPIOA_PIN9) | \
|
|
PIN_PUPDR_PULLUP(GPIOA_PIN10) | \
|
|
PIN_PUPDR_FLOATING(GPIOA_USB_DM) | \
|
|
PIN_PUPDR_FLOATING(GPIOA_USB_DP) | \
|
|
PIN_PUPDR_PULLUP(GPIOA_SWDIO) | \
|
|
PIN_PUPDR_PULLDOWN(GPIOA_SWCLK) | \
|
|
PIN_PUPDR_PULLUP(GPIOA_PIN15))
|
|
#define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_PIN0) | \
|
|
PIN_ODR_HIGH(GPIOA_PIN1) | \
|
|
PIN_ODR_HIGH(GPIOA_PIN2) | \
|
|
PIN_ODR_HIGH(GPIOA_PIN3) | \
|
|
PIN_ODR_HIGH(GPIOA_PIN4) | \
|
|
PIN_ODR_HIGH(GPIOA_PIN5) | \
|
|
PIN_ODR_HIGH(GPIOA_PIN6) | \
|
|
PIN_ODR_HIGH(GPIOA_PIN7) | \
|
|
PIN_ODR_HIGH(GPIOA_PIN8) | \
|
|
PIN_ODR_HIGH(GPIOA_PIN9) | \
|
|
PIN_ODR_HIGH(GPIOA_PIN10) | \
|
|
PIN_ODR_HIGH(GPIOA_USB_DM) | \
|
|
PIN_ODR_HIGH(GPIOA_USB_DP) | \
|
|
PIN_ODR_HIGH(GPIOA_SWDIO) | \
|
|
PIN_ODR_HIGH(GPIOA_SWCLK) | \
|
|
PIN_ODR_HIGH(GPIOA_PIN15))
|
|
#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_PIN0, 0) | \
|
|
PIN_AFIO_AF(GPIOA_PIN1, 1) | \
|
|
PIN_AFIO_AF(GPIOA_PIN2, 0) | \
|
|
PIN_AFIO_AF(GPIOA_PIN3, 0) | \
|
|
PIN_AFIO_AF(GPIOA_PIN4, 0) | \
|
|
PIN_AFIO_AF(GPIOA_PIN5, 5) | \
|
|
PIN_AFIO_AF(GPIOA_PIN6, 5) | \
|
|
PIN_AFIO_AF(GPIOA_PIN7, 5))
|
|
#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_PIN8, 0) | \
|
|
PIN_AFIO_AF(GPIOA_PIN9, 0) | \
|
|
PIN_AFIO_AF(GPIOA_PIN10, 0) | \
|
|
PIN_AFIO_AF(GPIOA_USB_DM, 14) | \
|
|
PIN_AFIO_AF(GPIOA_USB_DP, 14) | \
|
|
PIN_AFIO_AF(GPIOA_SWDIO, 0) | \
|
|
PIN_AFIO_AF(GPIOA_SWCLK, 0) | \
|
|
PIN_AFIO_AF(GPIOA_PIN15, 0))
|
|
|
|
/*
|
|
* GPIOB setup:
|
|
*
|
|
* PB0 - PIN0 (input pullup).
|
|
* PB1 - PIN1 (input pullup).
|
|
* PB2 - PIN2 (input pullup).
|
|
* PB3 - PIN3 (alternate 0).
|
|
* PB4 - PIN4 (input pullup).
|
|
* PB5 - PIN5 (input pullup).
|
|
* PB6 - PIN6 LSM303DLHC_SCL (alternate 4).
|
|
* PB7 - PIN7 LSM303DLHC_SDA (alternate 4).
|
|
* PB8 - PIN8 (input pullup).
|
|
* PB9 - PIN9 (input pullup).
|
|
* PB10 - PIN10 (input pullup).
|
|
* PB11 - PIN11 (input pullup).
|
|
* PB12 - PIN12 (input pullup).
|
|
* PB13 - PIN13 (input pullup).
|
|
* PB14 - PIN14 (input pullup).
|
|
* PB15 - PIN15 (input pullup).
|
|
*/
|
|
#define VAL_GPIOB_MODER (PIN_MODE_INPUT(GPIOB_PIN0) | \
|
|
PIN_MODE_INPUT(GPIOB_PIN1) | \
|
|
PIN_MODE_INPUT(GPIOB_PIN2) | \
|
|
PIN_MODE_ALTERNATE(GPIOB_PIN3) | \
|
|
PIN_MODE_INPUT(GPIOB_PIN4) | \
|
|
PIN_MODE_INPUT(GPIOB_PIN5) | \
|
|
PIN_MODE_ALTERNATE(GPIOB_PIN6) | \
|
|
PIN_MODE_OUTPUT(GPIOB_PIN7) | \
|
|
PIN_MODE_INPUT(GPIOB_PIN8) | \
|
|
PIN_MODE_INPUT(GPIOB_PIN9) | \
|
|
PIN_MODE_INPUT(GPIOB_PIN10) | \
|
|
PIN_MODE_INPUT(GPIOB_PIN11) | \
|
|
PIN_MODE_INPUT(GPIOB_PIN12) | \
|
|
PIN_MODE_INPUT(GPIOB_PIN13) | \
|
|
PIN_MODE_INPUT(GPIOB_PIN14) | \
|
|
PIN_MODE_INPUT(GPIOB_PIN15))
|
|
#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_PIN0) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOB_PIN1) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOB_PIN2) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOB_PIN3) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOB_PIN4) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOB_PIN5) | \
|
|
PIN_OTYPE_OPENDRAIN(GPIOB_PIN6) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOB_PIN7) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOB_PIN8) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOB_PIN9) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOB_PIN10) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOB_PIN11) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOB_PIN12) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOB_PIN13) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOB_PIN14) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOB_PIN15))
|
|
#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOB_PIN0) | \
|
|
PIN_OSPEED_VERYLOW(GPIOB_PIN1) | \
|
|
PIN_OSPEED_VERYLOW(GPIOB_PIN2) | \
|
|
PIN_OSPEED_HIGH(GPIOB_PIN3) | \
|
|
PIN_OSPEED_VERYLOW(GPIOB_PIN4) | \
|
|
PIN_OSPEED_VERYLOW(GPIOB_PIN5) | \
|
|
PIN_OSPEED_HIGH(GPIOB_PIN6) | \
|
|
PIN_OSPEED_VERYLOW(GPIOB_PIN7) | \
|
|
PIN_OSPEED_VERYLOW(GPIOB_PIN8) | \
|
|
PIN_OSPEED_VERYLOW(GPIOB_PIN9) | \
|
|
PIN_OSPEED_VERYLOW(GPIOB_PIN10) | \
|
|
PIN_OSPEED_VERYLOW(GPIOB_PIN11) | \
|
|
PIN_OSPEED_VERYLOW(GPIOB_PIN12) | \
|
|
PIN_OSPEED_VERYLOW(GPIOB_PIN13) | \
|
|
PIN_OSPEED_VERYLOW(GPIOB_PIN14) | \
|
|
PIN_OSPEED_VERYLOW(GPIOB_PIN15))
|
|
#define VAL_GPIOB_PUPDR (PIN_PUPDR_PULLUP(GPIOB_PIN0) | \
|
|
PIN_PUPDR_PULLUP(GPIOB_PIN1) | \
|
|
PIN_PUPDR_PULLUP(GPIOB_PIN2) | \
|
|
PIN_PUPDR_FLOATING(GPIOB_PIN3) | \
|
|
PIN_PUPDR_PULLUP(GPIOB_PIN4) | \
|
|
PIN_PUPDR_PULLUP(GPIOB_PIN5) | \
|
|
PIN_PUPDR_FLOATING(GPIOB_PIN6) | \
|
|
PIN_PUPDR_PULLDOWN(GPIOB_PIN7) | \
|
|
PIN_PUPDR_PULLUP(GPIOB_PIN8) | \
|
|
PIN_PUPDR_PULLUP(GPIOB_PIN9) | \
|
|
PIN_PUPDR_PULLUP(GPIOB_PIN10) | \
|
|
PIN_PUPDR_PULLUP(GPIOB_PIN11) | \
|
|
PIN_PUPDR_PULLUP(GPIOB_PIN12) | \
|
|
PIN_PUPDR_PULLUP(GPIOB_PIN13) | \
|
|
PIN_PUPDR_PULLUP(GPIOB_PIN14) | \
|
|
PIN_PUPDR_PULLUP(GPIOB_PIN15))
|
|
#define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_PIN0) | \
|
|
PIN_ODR_HIGH(GPIOB_PIN1) | \
|
|
PIN_ODR_HIGH(GPIOB_PIN2) | \
|
|
PIN_ODR_HIGH(GPIOB_PIN3) | \
|
|
PIN_ODR_HIGH(GPIOB_PIN4) | \
|
|
PIN_ODR_HIGH(GPIOB_PIN5) | \
|
|
PIN_ODR_HIGH(GPIOB_PIN6) | \
|
|
PIN_ODR_LOW(GPIOB_PIN7) | \
|
|
PIN_ODR_HIGH(GPIOB_PIN8) | \
|
|
PIN_ODR_HIGH(GPIOB_PIN9) | \
|
|
PIN_ODR_HIGH(GPIOB_PIN10) | \
|
|
PIN_ODR_HIGH(GPIOB_PIN11) | \
|
|
PIN_ODR_HIGH(GPIOB_PIN12) | \
|
|
PIN_ODR_HIGH(GPIOB_PIN13) | \
|
|
PIN_ODR_HIGH(GPIOB_PIN14) | \
|
|
PIN_ODR_HIGH(GPIOB_PIN15))
|
|
#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_PIN0, 0) | \
|
|
PIN_AFIO_AF(GPIOB_PIN1, 0) | \
|
|
PIN_AFIO_AF(GPIOB_PIN2, 0) | \
|
|
PIN_AFIO_AF(GPIOB_PIN3, 0) | \
|
|
PIN_AFIO_AF(GPIOB_PIN4, 0) | \
|
|
PIN_AFIO_AF(GPIOB_PIN5, 0) | \
|
|
PIN_AFIO_AF(GPIOB_PIN6, 4) | \
|
|
PIN_AFIO_AF(GPIOB_PIN7, 0))
|
|
#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_PIN8, 0) | \
|
|
PIN_AFIO_AF(GPIOB_PIN9, 0) | \
|
|
PIN_AFIO_AF(GPIOB_PIN10, 0) | \
|
|
PIN_AFIO_AF(GPIOB_PIN11, 0) | \
|
|
PIN_AFIO_AF(GPIOB_PIN12, 0) | \
|
|
PIN_AFIO_AF(GPIOB_PIN13, 0) | \
|
|
PIN_AFIO_AF(GPIOB_PIN14, 0) | \
|
|
PIN_AFIO_AF(GPIOB_PIN15, 0))
|
|
|
|
/*
|
|
* GPIOC setup:
|
|
*
|
|
* PC0 - PIN0 (input pullup).
|
|
* PC1 - PIN1 (input pullup).
|
|
* PC2 - PIN2 (input pullup).
|
|
* PC3 - PIN3 (input pullup).
|
|
* PC4 - PIN4 (input pullup).
|
|
* PC5 - PIN5 (input pullup).
|
|
* PC6 - PIN6 (input pullup).
|
|
* PC7 - PIN7 (input pullup).
|
|
* PC8 - PIN8 (input pullup).
|
|
* PC9 - PIN9 (input pullup).
|
|
* PC10 - PIN10 (input pullup).
|
|
* PC11 - PIN11 (input pullup).
|
|
* PC12 - PIN12 (input pullup).
|
|
* PC13 - PIN13 (input pullup).
|
|
* PC14 - PIN14 (input floating).
|
|
* PC15 - PIN15 (input floating).
|
|
*/
|
|
#define VAL_GPIOC_MODER (PIN_MODE_INPUT(GPIOC_PIN0) | \
|
|
PIN_MODE_INPUT(GPIOC_PIN1) | \
|
|
PIN_MODE_INPUT(GPIOC_PIN2) | \
|
|
PIN_MODE_INPUT(GPIOC_PIN3) | \
|
|
PIN_MODE_INPUT(GPIOC_PIN4) | \
|
|
PIN_MODE_INPUT(GPIOC_PIN5) | \
|
|
PIN_MODE_INPUT(GPIOC_PIN6) | \
|
|
PIN_MODE_INPUT(GPIOC_PIN7) | \
|
|
PIN_MODE_INPUT(GPIOC_PIN8) | \
|
|
PIN_MODE_INPUT(GPIOC_PIN9) | \
|
|
PIN_MODE_INPUT(GPIOC_PIN10) | \
|
|
PIN_MODE_INPUT(GPIOC_PIN11) | \
|
|
PIN_MODE_INPUT(GPIOC_PIN12) | \
|
|
PIN_MODE_INPUT(GPIOC_PIN13) | \
|
|
PIN_MODE_INPUT(GPIOC_PIN14) | \
|
|
PIN_MODE_INPUT(GPIOC_PIN15))
|
|
#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_PIN0) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOC_PIN1) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOC_PIN2) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOC_PIN3) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOC_PIN4) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOC_PIN5) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOC_PIN6) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOC_PIN7) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOC_PIN8) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOC_PIN9) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOC_PIN10) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOC_PIN11) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOC_PIN12) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOC_PIN13) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOC_PIN14) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOC_PIN15))
|
|
#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOC_PIN0) | \
|
|
PIN_OSPEED_VERYLOW(GPIOC_PIN1) | \
|
|
PIN_OSPEED_VERYLOW(GPIOC_PIN2) | \
|
|
PIN_OSPEED_VERYLOW(GPIOC_PIN3) | \
|
|
PIN_OSPEED_VERYLOW(GPIOC_PIN4) | \
|
|
PIN_OSPEED_VERYLOW(GPIOC_PIN5) | \
|
|
PIN_OSPEED_VERYLOW(GPIOC_PIN6) | \
|
|
PIN_OSPEED_VERYLOW(GPIOC_PIN7) | \
|
|
PIN_OSPEED_VERYLOW(GPIOC_PIN8) | \
|
|
PIN_OSPEED_VERYLOW(GPIOC_PIN9) | \
|
|
PIN_OSPEED_VERYLOW(GPIOC_PIN10) | \
|
|
PIN_OSPEED_VERYLOW(GPIOC_PIN11) | \
|
|
PIN_OSPEED_VERYLOW(GPIOC_PIN12) | \
|
|
PIN_OSPEED_VERYLOW(GPIOC_PIN13) | \
|
|
PIN_OSPEED_HIGH(GPIOC_PIN14) | \
|
|
PIN_OSPEED_HIGH(GPIOC_PIN15))
|
|
#define VAL_GPIOC_PUPDR (PIN_PUPDR_PULLUP(GPIOC_PIN0) | \
|
|
PIN_PUPDR_PULLUP(GPIOC_PIN1) | \
|
|
PIN_PUPDR_PULLUP(GPIOC_PIN2) | \
|
|
PIN_PUPDR_PULLUP(GPIOC_PIN3) | \
|
|
PIN_PUPDR_PULLUP(GPIOC_PIN4) | \
|
|
PIN_PUPDR_PULLUP(GPIOC_PIN5) | \
|
|
PIN_PUPDR_PULLUP(GPIOC_PIN6) | \
|
|
PIN_PUPDR_PULLUP(GPIOC_PIN7) | \
|
|
PIN_PUPDR_PULLUP(GPIOC_PIN8) | \
|
|
PIN_PUPDR_PULLUP(GPIOC_PIN9) | \
|
|
PIN_PUPDR_PULLUP(GPIOC_PIN10) | \
|
|
PIN_PUPDR_PULLUP(GPIOC_PIN11) | \
|
|
PIN_PUPDR_PULLUP(GPIOC_PIN12) | \
|
|
PIN_PUPDR_PULLUP(GPIOC_PIN13) | \
|
|
PIN_PUPDR_FLOATING(GPIOC_PIN14) | \
|
|
PIN_PUPDR_FLOATING(GPIOC_PIN15))
|
|
#define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_PIN0) | \
|
|
PIN_ODR_HIGH(GPIOC_PIN1) | \
|
|
PIN_ODR_HIGH(GPIOC_PIN2) | \
|
|
PIN_ODR_HIGH(GPIOC_PIN3) | \
|
|
PIN_ODR_HIGH(GPIOC_PIN4) | \
|
|
PIN_ODR_HIGH(GPIOC_PIN5) | \
|
|
PIN_ODR_HIGH(GPIOC_PIN6) | \
|
|
PIN_ODR_HIGH(GPIOC_PIN7) | \
|
|
PIN_ODR_HIGH(GPIOC_PIN8) | \
|
|
PIN_ODR_HIGH(GPIOC_PIN9) | \
|
|
PIN_ODR_HIGH(GPIOC_PIN10) | \
|
|
PIN_ODR_HIGH(GPIOC_PIN11) | \
|
|
PIN_ODR_HIGH(GPIOC_PIN12) | \
|
|
PIN_ODR_HIGH(GPIOC_PIN13) | \
|
|
PIN_ODR_HIGH(GPIOC_PIN14) | \
|
|
PIN_ODR_HIGH(GPIOC_PIN15))
|
|
#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_PIN0, 0) | \
|
|
PIN_AFIO_AF(GPIOC_PIN1, 0) | \
|
|
PIN_AFIO_AF(GPIOC_PIN2, 0) | \
|
|
PIN_AFIO_AF(GPIOC_PIN3, 0) | \
|
|
PIN_AFIO_AF(GPIOC_PIN4, 0) | \
|
|
PIN_AFIO_AF(GPIOC_PIN5, 0) | \
|
|
PIN_AFIO_AF(GPIOC_PIN6, 0) | \
|
|
PIN_AFIO_AF(GPIOC_PIN7, 0))
|
|
#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_PIN8, 0) | \
|
|
PIN_AFIO_AF(GPIOC_PIN9, 0) | \
|
|
PIN_AFIO_AF(GPIOC_PIN10, 0) | \
|
|
PIN_AFIO_AF(GPIOC_PIN11, 0) | \
|
|
PIN_AFIO_AF(GPIOC_PIN12, 0) | \
|
|
PIN_AFIO_AF(GPIOC_PIN13, 0) | \
|
|
PIN_AFIO_AF(GPIOC_PIN14, 0) | \
|
|
PIN_AFIO_AF(GPIOC_PIN15, 0))
|
|
|
|
/*
|
|
* GPIOD setup:
|
|
*
|
|
* PD0 - PIN0 (input pullup).
|
|
* PD1 - PIN1 (input pullup).
|
|
* PD2 - PIN2 (input pullup).
|
|
* PD3 - PIN3 (input pullup).
|
|
* PD4 - PIN4 (input pullup).
|
|
* PD5 - PIN5 (input pullup).
|
|
* PD6 - PIN6 (input pullup).
|
|
* PD7 - PIN7 (input pullup).
|
|
* PD8 - PIN8 (input pullup).
|
|
* PD9 - PIN9 (input pullup).
|
|
* PD11 - PIN10 (input pullup).
|
|
* PD11 - PIN11 (input pullup).
|
|
* PD12 - PIN12 (input pullup).
|
|
* PD13 - PIN13 (input pullup).
|
|
* PD14 - PIN14 (input pullup).
|
|
* PD15 - PIN15 (input pullup).
|
|
*/
|
|
#define VAL_GPIOD_MODER (PIN_MODE_INPUT(GPIOD_PIN0) | \
|
|
PIN_MODE_INPUT(GPIOD_PIN1) | \
|
|
PIN_MODE_INPUT(GPIOD_PIN2) | \
|
|
PIN_MODE_INPUT(GPIOD_PIN3) | \
|
|
PIN_MODE_INPUT(GPIOD_PIN4) | \
|
|
PIN_MODE_INPUT(GPIOD_PIN5) | \
|
|
PIN_MODE_INPUT(GPIOD_PIN6) | \
|
|
PIN_MODE_INPUT(GPIOD_PIN7) | \
|
|
PIN_MODE_INPUT(GPIOD_PIN8) | \
|
|
PIN_MODE_INPUT(GPIOD_PIN9) | \
|
|
PIN_MODE_INPUT(GPIOD_PIN10) | \
|
|
PIN_MODE_INPUT(GPIOD_PIN11) | \
|
|
PIN_MODE_INPUT(GPIOD_PIN12) | \
|
|
PIN_MODE_INPUT(GPIOD_PIN13) | \
|
|
PIN_MODE_INPUT(GPIOD_PIN14) | \
|
|
PIN_MODE_INPUT(GPIOD_PIN15))
|
|
#define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN1) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN2) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN3) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN4) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN5) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN6) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN7) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN8) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN9) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN10) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN11) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN12) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN13) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN14) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN15))
|
|
#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOD_PIN0) | \
|
|
PIN_OSPEED_VERYLOW(GPIOD_PIN1) | \
|
|
PIN_OSPEED_VERYLOW(GPIOD_PIN2) | \
|
|
PIN_OSPEED_VERYLOW(GPIOD_PIN3) | \
|
|
PIN_OSPEED_VERYLOW(GPIOD_PIN4) | \
|
|
PIN_OSPEED_VERYLOW(GPIOD_PIN5) | \
|
|
PIN_OSPEED_VERYLOW(GPIOD_PIN6) | \
|
|
PIN_OSPEED_VERYLOW(GPIOD_PIN7) | \
|
|
PIN_OSPEED_VERYLOW(GPIOD_PIN8) | \
|
|
PIN_OSPEED_VERYLOW(GPIOD_PIN9) | \
|
|
PIN_OSPEED_VERYLOW(GPIOD_PIN10) | \
|
|
PIN_OSPEED_VERYLOW(GPIOD_PIN11) | \
|
|
PIN_OSPEED_VERYLOW(GPIOD_PIN12) | \
|
|
PIN_OSPEED_VERYLOW(GPIOD_PIN13) | \
|
|
PIN_OSPEED_VERYLOW(GPIOD_PIN14) | \
|
|
PIN_OSPEED_VERYLOW(GPIOD_PIN15))
|
|
#define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLUP(GPIOD_PIN0) | \
|
|
PIN_PUPDR_PULLUP(GPIOD_PIN1) | \
|
|
PIN_PUPDR_PULLUP(GPIOD_PIN2) | \
|
|
PIN_PUPDR_PULLUP(GPIOD_PIN3) | \
|
|
PIN_PUPDR_PULLUP(GPIOD_PIN4) | \
|
|
PIN_PUPDR_PULLUP(GPIOD_PIN5) | \
|
|
PIN_PUPDR_PULLUP(GPIOD_PIN6) | \
|
|
PIN_PUPDR_PULLUP(GPIOD_PIN7) | \
|
|
PIN_PUPDR_PULLUP(GPIOD_PIN8) | \
|
|
PIN_PUPDR_PULLUP(GPIOD_PIN9) | \
|
|
PIN_PUPDR_PULLUP(GPIOD_PIN10) | \
|
|
PIN_PUPDR_PULLUP(GPIOD_PIN11) | \
|
|
PIN_PUPDR_PULLUP(GPIOD_PIN12) | \
|
|
PIN_PUPDR_PULLUP(GPIOD_PIN13) | \
|
|
PIN_PUPDR_PULLUP(GPIOD_PIN14) | \
|
|
PIN_PUPDR_PULLUP(GPIOD_PIN15))
|
|
#define VAL_GPIOD_ODR (PIN_ODR_HIGH(GPIOD_PIN0) | \
|
|
PIN_ODR_HIGH(GPIOD_PIN1) | \
|
|
PIN_ODR_HIGH(GPIOD_PIN2) | \
|
|
PIN_ODR_HIGH(GPIOD_PIN3) | \
|
|
PIN_ODR_HIGH(GPIOD_PIN4) | \
|
|
PIN_ODR_HIGH(GPIOD_PIN5) | \
|
|
PIN_ODR_HIGH(GPIOD_PIN6) | \
|
|
PIN_ODR_HIGH(GPIOD_PIN7) | \
|
|
PIN_ODR_HIGH(GPIOD_PIN8) | \
|
|
PIN_ODR_HIGH(GPIOD_PIN9) | \
|
|
PIN_ODR_HIGH(GPIOD_PIN10) | \
|
|
PIN_ODR_HIGH(GPIOD_PIN11) | \
|
|
PIN_ODR_HIGH(GPIOD_PIN12) | \
|
|
PIN_ODR_HIGH(GPIOD_PIN13) | \
|
|
PIN_ODR_HIGH(GPIOD_PIN14) | \
|
|
PIN_ODR_HIGH(GPIOD_PIN15))
|
|
#define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_PIN0, 0) | \
|
|
PIN_AFIO_AF(GPIOD_PIN1, 0) | \
|
|
PIN_AFIO_AF(GPIOD_PIN2, 0) | \
|
|
PIN_AFIO_AF(GPIOD_PIN3, 0) | \
|
|
PIN_AFIO_AF(GPIOD_PIN4, 0) | \
|
|
PIN_AFIO_AF(GPIOD_PIN5, 0) | \
|
|
PIN_AFIO_AF(GPIOD_PIN6, 0) | \
|
|
PIN_AFIO_AF(GPIOD_PIN7, 0))
|
|
#define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_PIN8, 0) | \
|
|
PIN_AFIO_AF(GPIOD_PIN9, 0) | \
|
|
PIN_AFIO_AF(GPIOD_PIN10, 0) | \
|
|
PIN_AFIO_AF(GPIOD_PIN11, 0) | \
|
|
PIN_AFIO_AF(GPIOD_PIN12, 0) | \
|
|
PIN_AFIO_AF(GPIOD_PIN13, 0) | \
|
|
PIN_AFIO_AF(GPIOD_PIN14, 0) | \
|
|
PIN_AFIO_AF(GPIOD_PIN15, 0))
|
|
|
|
/*
|
|
* GPIOE setup:
|
|
*
|
|
* PE0 - PIN0 (input pullup).
|
|
* PE1 - PIN1 (input pullup).
|
|
* PE2 - PIN2 (input pullup).
|
|
* PE3 - PIN3 L3GD20_CS (output pushpull maximum).
|
|
* PE4 - PIN4 (input pullup).
|
|
* PE5 - PIN5 (input pullup).
|
|
* PE6 - PIN6 (input pullup).
|
|
* PE7 - PIN7 (input pullup).
|
|
* PE8 - PIN8 (output pushpull maximum).
|
|
* PE9 - PIN9 (output pushpull maximum).
|
|
* PE10 - PIN10 (output pushpull maximum).
|
|
* PE11 - PIN11 (output pushpull maximum).
|
|
* PE12 - PIN12 (output pushpull maximum).
|
|
* PE13 - PIN13 (output pushpull maximum).
|
|
* PE14 - PIN14 (output pushpull maximum).
|
|
* PE15 - PIN15 (output pushpull maximum).
|
|
*/
|
|
#define VAL_GPIOE_MODER (PIN_MODE_INPUT(GPIOE_PIN0) | \
|
|
PIN_MODE_INPUT(GPIOE_PIN1) | \
|
|
PIN_MODE_INPUT(GPIOE_PIN2) |\
|
|
PIN_MODE_OUTPUT(GPIOE_PIN3) | \
|
|
PIN_MODE_INPUT(GPIOE_PIN4) |\
|
|
PIN_MODE_INPUT(GPIOE_PIN5) |\
|
|
PIN_MODE_INPUT(GPIOE_PIN6) | \
|
|
PIN_MODE_INPUT(GPIOE_PIN7) | \
|
|
PIN_MODE_OUTPUT(GPIOE_PIN8) | \
|
|
PIN_MODE_OUTPUT(GPIOE_PIN9) | \
|
|
PIN_MODE_OUTPUT(GPIOE_PIN10) | \
|
|
PIN_MODE_OUTPUT(GPIOE_PIN11) | \
|
|
PIN_MODE_OUTPUT(GPIOE_PIN12) | \
|
|
PIN_MODE_OUTPUT(GPIOE_PIN13) | \
|
|
PIN_MODE_OUTPUT(GPIOE_PIN14) | \
|
|
PIN_MODE_OUTPUT(GPIOE_PIN15))
|
|
#define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(GPIOE_PIN0) |\
|
|
PIN_OTYPE_PUSHPULL(GPIOE_PIN1) |\
|
|
PIN_OTYPE_PUSHPULL(GPIOE_PIN2) |\
|
|
PIN_OTYPE_PUSHPULL(GPIOE_PIN3) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOE_PIN4) |\
|
|
PIN_OTYPE_PUSHPULL(GPIOE_PIN5) |\
|
|
PIN_OTYPE_PUSHPULL(GPIOE_PIN6) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOE_PIN7) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOE_PIN8) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOE_PIN9) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOE_PIN10) |\
|
|
PIN_OTYPE_PUSHPULL(GPIOE_PIN11) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOE_PIN12) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOE_PIN13) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOE_PIN14) |\
|
|
PIN_OTYPE_PUSHPULL(GPIOE_PIN15))
|
|
#define VAL_GPIOE_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOE_PIN0) |\
|
|
PIN_OSPEED_VERYLOW(GPIOE_PIN1) |\
|
|
PIN_OSPEED_VERYLOW(GPIOE_PIN2) |\
|
|
PIN_OSPEED_HIGH(GPIOE_PIN3) | \
|
|
PIN_OSPEED_VERYLOW(GPIOE_PIN4) |\
|
|
PIN_OSPEED_VERYLOW(GPIOE_PIN5) |\
|
|
PIN_OSPEED_VERYLOW(GPIOE_PIN6) | \
|
|
PIN_OSPEED_VERYLOW(GPIOE_PIN7) | \
|
|
PIN_OSPEED_HIGH(GPIOE_PIN8) | \
|
|
PIN_OSPEED_HIGH(GPIOE_PIN9) | \
|
|
PIN_OSPEED_HIGH(GPIOE_PIN10) | \
|
|
PIN_OSPEED_HIGH(GPIOE_PIN11) | \
|
|
PIN_OSPEED_HIGH(GPIOE_PIN12) | \
|
|
PIN_OSPEED_HIGH(GPIOE_PIN13) | \
|
|
PIN_OSPEED_HIGH(GPIOE_PIN14) | \
|
|
PIN_OSPEED_HIGH(GPIOE_PIN15))
|
|
#define VAL_GPIOE_PUPDR (PIN_PUPDR_PULLUP(GPIOE_PIN0) | \
|
|
PIN_PUPDR_PULLUP(GPIOE_PIN1) | \
|
|
PIN_PUPDR_PULLUP(GPIOE_PIN2) |\
|
|
PIN_PUPDR_FLOATING(GPIOE_PIN3) | \
|
|
PIN_PUPDR_PULLUP(GPIOE_PIN4) |\
|
|
PIN_PUPDR_PULLUP(GPIOE_PIN5) |\
|
|
PIN_PUPDR_PULLUP(GPIOE_PIN6) | \
|
|
PIN_PUPDR_PULLUP(GPIOE_PIN7) | \
|
|
PIN_PUPDR_PULLUP(GPIOE_PIN8) | \
|
|
PIN_PUPDR_PULLUP(GPIOE_PIN9) | \
|
|
PIN_PUPDR_PULLUP(GPIOE_PIN10) | \
|
|
PIN_PUPDR_FLOATING(GPIOE_PIN11) | \
|
|
PIN_PUPDR_PULLUP(GPIOE_PIN12) | \
|
|
PIN_PUPDR_FLOATING(GPIOE_PIN13) | \
|
|
PIN_PUPDR_FLOATING(GPIOE_PIN14) |\
|
|
PIN_PUPDR_FLOATING(GPIOE_PIN15))
|
|
#define VAL_GPIOE_ODR (PIN_ODR_HIGH(GPIOE_PIN0) | \
|
|
PIN_ODR_HIGH(GPIOE_PIN1) | \
|
|
PIN_ODR_HIGH(GPIOE_PIN2) | \
|
|
PIN_ODR_HIGH(GPIOE_PIN3) | \
|
|
PIN_ODR_HIGH(GPIOE_PIN4) | \
|
|
PIN_ODR_HIGH(GPIOE_PIN5) | \
|
|
PIN_ODR_HIGH(GPIOE_PIN6) | \
|
|
PIN_ODR_HIGH(GPIOE_PIN7) | \
|
|
PIN_ODR_LOW(GPIOE_PIN8) | \
|
|
PIN_ODR_LOW(GPIOE_PIN9) | \
|
|
PIN_ODR_LOW(GPIOE_PIN10) | \
|
|
PIN_ODR_LOW(GPIOE_PIN11) | \
|
|
PIN_ODR_LOW(GPIOE_PIN12) | \
|
|
PIN_ODR_LOW(GPIOE_PIN13) | \
|
|
PIN_ODR_LOW(GPIOE_PIN14) | \
|
|
PIN_ODR_LOW(GPIOE_PIN15))
|
|
#define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_PIN0, 0) | \
|
|
PIN_AFIO_AF(GPIOE_PIN1, 0) | \
|
|
PIN_AFIO_AF(GPIOE_PIN2, 0) |\
|
|
PIN_AFIO_AF(GPIOE_PIN3, 0) | \
|
|
PIN_AFIO_AF(GPIOE_PIN4, 0) |\
|
|
PIN_AFIO_AF(GPIOE_PIN5, 0) |\
|
|
PIN_AFIO_AF(GPIOE_PIN6, 0) | \
|
|
PIN_AFIO_AF(GPIOE_PIN7, 0))
|
|
#define VAL_GPIOE_AFRH (PIN_AFIO_AF(GPIOE_PIN8, 0) | \
|
|
PIN_AFIO_AF(GPIOE_PIN9, 0) | \
|
|
PIN_AFIO_AF(GPIOE_PIN10, 0) | \
|
|
PIN_AFIO_AF(GPIOE_PIN11, 0) | \
|
|
PIN_AFIO_AF(GPIOE_PIN12, 0) | \
|
|
PIN_AFIO_AF(GPIOE_PIN13, 0) | \
|
|
PIN_AFIO_AF(GPIOE_PIN14, 0) | \
|
|
PIN_AFIO_AF(GPIOE_PIN15, 0))
|
|
|
|
/*
|
|
* GPIOF setup:
|
|
*
|
|
* PF0 - I2C2_SDA (input floating).
|
|
* PF1 - I2C2_SCL (input floating).
|
|
* PF2 - PIN2 (input pullup).
|
|
* PF3 - PIN3 (input pullup).
|
|
* PF4 - PIN4 (input pullup).
|
|
* PF5 - PIN5 (input pullup).
|
|
* PF6 - PIN6 (input pullup).
|
|
* PF7 - PIN7 (input pullup).
|
|
* PF8 - PIN8 (input pullup).
|
|
* PF9 - PIN9 (input pullup).
|
|
* PF10 - PIN10 (input pullup).
|
|
* PF11 - PIN11 (input pullup).
|
|
* PF12 - PIN12 (input pullup).
|
|
* PF13 - PIN13 (input pullup).
|
|
* PF14 - PIN14 (input pullup).
|
|
* PF15 - PIN15 (input pullup).
|
|
*/
|
|
#define VAL_GPIOF_MODER (PIN_MODE_INPUT(GPIOF_I2C2_SDA) | \
|
|
PIN_MODE_INPUT(GPIOF_I2C2_SCL) | \
|
|
PIN_MODE_INPUT(GPIOF_PIN2) | \
|
|
PIN_MODE_INPUT(GPIOF_PIN3) | \
|
|
PIN_MODE_INPUT(GPIOF_PIN4) | \
|
|
PIN_MODE_INPUT(GPIOF_PIN5) | \
|
|
PIN_MODE_INPUT(GPIOF_PIN6) | \
|
|
PIN_MODE_INPUT(GPIOF_PIN7) | \
|
|
PIN_MODE_INPUT(GPIOF_PIN8) | \
|
|
PIN_MODE_INPUT(GPIOF_PIN9) | \
|
|
PIN_MODE_INPUT(GPIOF_PIN10) | \
|
|
PIN_MODE_INPUT(GPIOF_PIN11) | \
|
|
PIN_MODE_INPUT(GPIOF_PIN12) | \
|
|
PIN_MODE_INPUT(GPIOF_PIN13) | \
|
|
PIN_MODE_INPUT(GPIOF_PIN14) | \
|
|
PIN_MODE_INPUT(GPIOF_PIN15))
|
|
#define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(GPIOF_I2C2_SDA) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOF_I2C2_SCL) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOF_PIN2) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOF_PIN3) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOF_PIN4) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOF_PIN5) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOF_PIN6) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOF_PIN7) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOF_PIN8) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOF_PIN9) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOF_PIN10) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOF_PIN11) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOF_PIN12) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOF_PIN13) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOF_PIN14) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOF_PIN15))
|
|
#define VAL_GPIOF_OSPEEDR (PIN_OSPEED_HIGH(GPIOF_I2C2_SDA) | \
|
|
PIN_OSPEED_HIGH(GPIOF_I2C2_SCL) | \
|
|
PIN_OSPEED_VERYLOW(GPIOF_PIN2) | \
|
|
PIN_OSPEED_VERYLOW(GPIOF_PIN3) | \
|
|
PIN_OSPEED_VERYLOW(GPIOF_PIN4) | \
|
|
PIN_OSPEED_VERYLOW(GPIOF_PIN5) | \
|
|
PIN_OSPEED_VERYLOW(GPIOF_PIN6) | \
|
|
PIN_OSPEED_VERYLOW(GPIOF_PIN7) | \
|
|
PIN_OSPEED_VERYLOW(GPIOF_PIN8) | \
|
|
PIN_OSPEED_VERYLOW(GPIOF_PIN9) | \
|
|
PIN_OSPEED_VERYLOW(GPIOF_PIN10) | \
|
|
PIN_OSPEED_VERYLOW(GPIOF_PIN11) | \
|
|
PIN_OSPEED_VERYLOW(GPIOF_PIN12) | \
|
|
PIN_OSPEED_VERYLOW(GPIOF_PIN13) | \
|
|
PIN_OSPEED_VERYLOW(GPIOF_PIN14) | \
|
|
PIN_OSPEED_VERYLOW(GPIOF_PIN15))
|
|
#define VAL_GPIOF_PUPDR (PIN_PUPDR_FLOATING(GPIOF_I2C2_SDA) | \
|
|
PIN_PUPDR_FLOATING(GPIOF_I2C2_SCL) | \
|
|
PIN_PUPDR_PULLUP(GPIOF_PIN2) | \
|
|
PIN_PUPDR_PULLUP(GPIOF_PIN3) | \
|
|
PIN_PUPDR_PULLUP(GPIOF_PIN4) | \
|
|
PIN_PUPDR_PULLUP(GPIOF_PIN5) | \
|
|
PIN_PUPDR_PULLUP(GPIOF_PIN6) | \
|
|
PIN_PUPDR_PULLUP(GPIOF_PIN7) | \
|
|
PIN_PUPDR_PULLUP(GPIOF_PIN8) | \
|
|
PIN_PUPDR_PULLUP(GPIOF_PIN9) | \
|
|
PIN_PUPDR_PULLUP(GPIOF_PIN10) | \
|
|
PIN_PUPDR_PULLUP(GPIOF_PIN11) | \
|
|
PIN_PUPDR_PULLUP(GPIOF_PIN12) | \
|
|
PIN_PUPDR_PULLUP(GPIOF_PIN13) | \
|
|
PIN_PUPDR_PULLUP(GPIOF_PIN14) | \
|
|
PIN_PUPDR_PULLUP(GPIOF_PIN15))
|
|
#define VAL_GPIOF_ODR (PIN_ODR_HIGH(GPIOF_I2C2_SDA) | \
|
|
PIN_ODR_HIGH(GPIOF_I2C2_SCL) | \
|
|
PIN_ODR_HIGH(GPIOF_PIN2) | \
|
|
PIN_ODR_HIGH(GPIOF_PIN3) | \
|
|
PIN_ODR_HIGH(GPIOF_PIN4) | \
|
|
PIN_ODR_HIGH(GPIOF_PIN5) | \
|
|
PIN_ODR_HIGH(GPIOF_PIN6) | \
|
|
PIN_ODR_HIGH(GPIOF_PIN7) | \
|
|
PIN_ODR_HIGH(GPIOF_PIN8) | \
|
|
PIN_ODR_HIGH(GPIOF_PIN9) | \
|
|
PIN_ODR_HIGH(GPIOF_PIN10) | \
|
|
PIN_ODR_HIGH(GPIOF_PIN11) | \
|
|
PIN_ODR_HIGH(GPIOF_PIN12) | \
|
|
PIN_ODR_HIGH(GPIOF_PIN13) | \
|
|
PIN_ODR_HIGH(GPIOF_PIN14) | \
|
|
PIN_ODR_HIGH(GPIOF_PIN15))
|
|
#define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_I2C2_SDA, 0) | \
|
|
PIN_AFIO_AF(GPIOF_I2C2_SCL, 0) | \
|
|
PIN_AFIO_AF(GPIOF_PIN2, 0) | \
|
|
PIN_AFIO_AF(GPIOF_PIN3, 0) | \
|
|
PIN_AFIO_AF(GPIOF_PIN4, 0) | \
|
|
PIN_AFIO_AF(GPIOF_PIN5, 0) | \
|
|
PIN_AFIO_AF(GPIOF_PIN6, 0) | \
|
|
PIN_AFIO_AF(GPIOF_PIN7, 0))
|
|
#define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, 0) | \
|
|
PIN_AFIO_AF(GPIOF_PIN9, 0) | \
|
|
PIN_AFIO_AF(GPIOF_PIN10, 0) | \
|
|
PIN_AFIO_AF(GPIOF_PIN11, 0) | \
|
|
PIN_AFIO_AF(GPIOF_PIN12, 0) | \
|
|
PIN_AFIO_AF(GPIOF_PIN13, 0) | \
|
|
PIN_AFIO_AF(GPIOF_PIN14, 0) | \
|
|
PIN_AFIO_AF(GPIOF_PIN15, 0))
|
|
|
|
/*
|
|
* GPIOG setup:
|
|
*
|
|
* PG0 - PIN0 (input pullup).
|
|
* PG1 - PIN1 (input pullup).
|
|
* PG2 - PIN2 (input pullup).
|
|
* PG3 - PIN3 (input pullup).
|
|
* PG4 - PIN4 (input pullup).
|
|
* PG5 - PIN5 (input pullup).
|
|
* PG6 - PIN6 (input pullup).
|
|
* PG7 - PIN7 (input pullup).
|
|
* PG8 - PIN8 (input pullup).
|
|
* PG9 - PIN9 (input pullup).
|
|
* PG10 - PIN10 (input pullup).
|
|
* PG11 - PIN11 (input pullup).
|
|
* PG12 - PIN12 (input pullup).
|
|
* PG13 - PIN13 (input pullup).
|
|
* PG14 - PIN14 (input pullup).
|
|
* PG15 - PIN15 (input pullup).
|
|
*/
|
|
#define VAL_GPIOG_MODER (PIN_MODE_INPUT(GPIOG_PIN0) | \
|
|
PIN_MODE_INPUT(GPIOG_PIN1) | \
|
|
PIN_MODE_INPUT(GPIOG_PIN2) | \
|
|
PIN_MODE_INPUT(GPIOG_PIN3) | \
|
|
PIN_MODE_INPUT(GPIOG_PIN4) | \
|
|
PIN_MODE_INPUT(GPIOG_PIN5) | \
|
|
PIN_MODE_INPUT(GPIOG_PIN6) | \
|
|
PIN_MODE_INPUT(GPIOG_PIN7) | \
|
|
PIN_MODE_INPUT(GPIOG_PIN8) | \
|
|
PIN_MODE_INPUT(GPIOG_PIN9) | \
|
|
PIN_MODE_INPUT(GPIOG_PIN10) | \
|
|
PIN_MODE_INPUT(GPIOG_PIN11) | \
|
|
PIN_MODE_INPUT(GPIOG_PIN12) | \
|
|
PIN_MODE_INPUT(GPIOG_PIN13) | \
|
|
PIN_MODE_INPUT(GPIOG_PIN14) | \
|
|
PIN_MODE_INPUT(GPIOG_PIN15))
|
|
#define VAL_GPIOG_OTYPER (PIN_OTYPE_PUSHPULL(GPIOG_PIN0) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOG_PIN1) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOG_PIN2) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOG_PIN3) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOG_PIN4) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOG_PIN5) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOG_PIN6) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOG_PIN7) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOG_PIN8) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOG_PIN9) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOG_PIN10) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOG_PIN11) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOG_PIN12) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOG_PIN13) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOG_PIN14) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOG_PIN15))
|
|
#define VAL_GPIOG_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOG_PIN0) | \
|
|
PIN_OSPEED_VERYLOW(GPIOG_PIN1) | \
|
|
PIN_OSPEED_VERYLOW(GPIOG_PIN2) | \
|
|
PIN_OSPEED_VERYLOW(GPIOG_PIN3) | \
|
|
PIN_OSPEED_VERYLOW(GPIOG_PIN4) | \
|
|
PIN_OSPEED_VERYLOW(GPIOG_PIN5) | \
|
|
PIN_OSPEED_VERYLOW(GPIOG_PIN6) | \
|
|
PIN_OSPEED_VERYLOW(GPIOG_PIN7) | \
|
|
PIN_OSPEED_VERYLOW(GPIOG_PIN8) | \
|
|
PIN_OSPEED_VERYLOW(GPIOG_PIN9) | \
|
|
PIN_OSPEED_VERYLOW(GPIOG_PIN10) | \
|
|
PIN_OSPEED_VERYLOW(GPIOG_PIN11) | \
|
|
PIN_OSPEED_VERYLOW(GPIOG_PIN12) | \
|
|
PIN_OSPEED_VERYLOW(GPIOG_PIN13) | \
|
|
PIN_OSPEED_VERYLOW(GPIOG_PIN14) | \
|
|
PIN_OSPEED_VERYLOW(GPIOG_PIN15))
|
|
#define VAL_GPIOG_PUPDR (PIN_PUPDR_PULLUP(GPIOG_PIN0) | \
|
|
PIN_PUPDR_PULLUP(GPIOG_PIN1) | \
|
|
PIN_PUPDR_PULLUP(GPIOG_PIN2) | \
|
|
PIN_PUPDR_PULLUP(GPIOG_PIN3) | \
|
|
PIN_PUPDR_PULLUP(GPIOG_PIN4) | \
|
|
PIN_PUPDR_PULLUP(GPIOG_PIN5) | \
|
|
PIN_PUPDR_PULLUP(GPIOG_PIN6) | \
|
|
PIN_PUPDR_PULLUP(GPIOG_PIN7) | \
|
|
PIN_PUPDR_PULLUP(GPIOG_PIN8) | \
|
|
PIN_PUPDR_PULLUP(GPIOG_PIN9) | \
|
|
PIN_PUPDR_PULLUP(GPIOG_PIN10) | \
|
|
PIN_PUPDR_PULLUP(GPIOG_PIN11) | \
|
|
PIN_PUPDR_PULLUP(GPIOG_PIN12) | \
|
|
PIN_PUPDR_PULLUP(GPIOG_PIN13) | \
|
|
PIN_PUPDR_PULLUP(GPIOG_PIN14) | \
|
|
PIN_PUPDR_PULLUP(GPIOG_PIN15))
|
|
#define VAL_GPIOG_ODR (PIN_ODR_HIGH(GPIOG_PIN0) | \
|
|
PIN_ODR_HIGH(GPIOG_PIN1) | \
|
|
PIN_ODR_HIGH(GPIOG_PIN2) | \
|
|
PIN_ODR_HIGH(GPIOG_PIN3) | \
|
|
PIN_ODR_HIGH(GPIOG_PIN4) | \
|
|
PIN_ODR_HIGH(GPIOG_PIN5) | \
|
|
PIN_ODR_HIGH(GPIOG_PIN6) | \
|
|
PIN_ODR_HIGH(GPIOG_PIN7) | \
|
|
PIN_ODR_HIGH(GPIOG_PIN8) | \
|
|
PIN_ODR_HIGH(GPIOG_PIN9) | \
|
|
PIN_ODR_HIGH(GPIOG_PIN10) | \
|
|
PIN_ODR_HIGH(GPIOG_PIN11) | \
|
|
PIN_ODR_HIGH(GPIOG_PIN12) | \
|
|
PIN_ODR_HIGH(GPIOG_PIN13) | \
|
|
PIN_ODR_HIGH(GPIOG_PIN14) | \
|
|
PIN_ODR_HIGH(GPIOG_PIN15))
|
|
#define VAL_GPIOG_AFRL (PIN_AFIO_AF(GPIOG_PIN0, 0) | \
|
|
PIN_AFIO_AF(GPIOG_PIN1, 0) | \
|
|
PIN_AFIO_AF(GPIOG_PIN2, 0) | \
|
|
PIN_AFIO_AF(GPIOG_PIN3, 0) | \
|
|
PIN_AFIO_AF(GPIOG_PIN4, 0) | \
|
|
PIN_AFIO_AF(GPIOG_PIN5, 0) | \
|
|
PIN_AFIO_AF(GPIOG_PIN6, 0) | \
|
|
PIN_AFIO_AF(GPIOG_PIN7, 0))
|
|
#define VAL_GPIOG_AFRH (PIN_AFIO_AF(GPIOG_PIN8, 0) | \
|
|
PIN_AFIO_AF(GPIOG_PIN9, 0) | \
|
|
PIN_AFIO_AF(GPIOG_PIN10, 0) | \
|
|
PIN_AFIO_AF(GPIOG_PIN11, 0) | \
|
|
PIN_AFIO_AF(GPIOG_PIN12, 0) | \
|
|
PIN_AFIO_AF(GPIOG_PIN13, 0) | \
|
|
PIN_AFIO_AF(GPIOG_PIN14, 0) | \
|
|
PIN_AFIO_AF(GPIOG_PIN15, 0))
|
|
|
|
/*
|
|
* GPIOH setup:
|
|
*
|
|
* PH0 - PIN0 (input pullup).
|
|
* PH1 - PIN1 (input pullup).
|
|
* PH2 - PIN2 (input pullup).
|
|
* PH3 - PIN3 (input pullup).
|
|
* PH4 - PIN4 (input pullup).
|
|
* PH5 - PIN5 (input pullup).
|
|
* PH6 - PIN6 (input pullup).
|
|
* PH7 - PIN7 (input pullup).
|
|
* PH8 - PIN8 (input pullup).
|
|
* PH9 - PIN9 (input pullup).
|
|
* PH10 - PIN10 (input pullup).
|
|
* PH11 - PIN11 (input pullup).
|
|
* PH12 - PIN12 (input pullup).
|
|
* PH13 - PIN13 (input pullup).
|
|
* PH14 - PIN14 (input pullup).
|
|
* PH15 - PIN15 (input pullup).
|
|
*/
|
|
#define VAL_GPIOH_MODER (PIN_MODE_INPUT(GPIOH_PIN0) | \
|
|
PIN_MODE_INPUT(GPIOH_PIN1) | \
|
|
PIN_MODE_INPUT(GPIOH_PIN2) | \
|
|
PIN_MODE_INPUT(GPIOH_PIN3) | \
|
|
PIN_MODE_INPUT(GPIOH_PIN4) | \
|
|
PIN_MODE_INPUT(GPIOH_PIN5) | \
|
|
PIN_MODE_INPUT(GPIOH_PIN6) | \
|
|
PIN_MODE_INPUT(GPIOH_PIN7) | \
|
|
PIN_MODE_INPUT(GPIOH_PIN8) | \
|
|
PIN_MODE_INPUT(GPIOH_PIN9) | \
|
|
PIN_MODE_INPUT(GPIOH_PIN10) | \
|
|
PIN_MODE_INPUT(GPIOH_PIN11) | \
|
|
PIN_MODE_INPUT(GPIOH_PIN12) | \
|
|
PIN_MODE_INPUT(GPIOH_PIN13) | \
|
|
PIN_MODE_INPUT(GPIOH_PIN14) | \
|
|
PIN_MODE_INPUT(GPIOH_PIN15))
|
|
#define VAL_GPIOH_OTYPER (PIN_OTYPE_PUSHPULL(GPIOH_PIN0) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOH_PIN1) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOH_PIN2) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOH_PIN3) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOH_PIN4) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOH_PIN5) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOH_PIN6) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOH_PIN7) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOH_PIN8) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOH_PIN9) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOH_PIN10) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOH_PIN11) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOH_PIN12) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOH_PIN13) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOH_PIN14) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOH_PIN15))
|
|
#define VAL_GPIOH_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOH_PIN0) | \
|
|
PIN_OSPEED_VERYLOW(GPIOH_PIN1) | \
|
|
PIN_OSPEED_VERYLOW(GPIOH_PIN2) | \
|
|
PIN_OSPEED_VERYLOW(GPIOH_PIN3) | \
|
|
PIN_OSPEED_VERYLOW(GPIOH_PIN4) | \
|
|
PIN_OSPEED_VERYLOW(GPIOH_PIN5) | \
|
|
PIN_OSPEED_VERYLOW(GPIOH_PIN6) | \
|
|
PIN_OSPEED_VERYLOW(GPIOH_PIN7) | \
|
|
PIN_OSPEED_VERYLOW(GPIOH_PIN8) | \
|
|
PIN_OSPEED_VERYLOW(GPIOH_PIN9) | \
|
|
PIN_OSPEED_VERYLOW(GPIOH_PIN10) | \
|
|
PIN_OSPEED_VERYLOW(GPIOH_PIN11) | \
|
|
PIN_OSPEED_VERYLOW(GPIOH_PIN12) | \
|
|
PIN_OSPEED_VERYLOW(GPIOH_PIN13) | \
|
|
PIN_OSPEED_VERYLOW(GPIOH_PIN14) | \
|
|
PIN_OSPEED_VERYLOW(GPIOH_PIN15))
|
|
#define VAL_GPIOH_PUPDR (PIN_PUPDR_PULLUP(GPIOH_PIN0) | \
|
|
PIN_PUPDR_PULLUP(GPIOH_PIN1) | \
|
|
PIN_PUPDR_PULLUP(GPIOH_PIN2) | \
|
|
PIN_PUPDR_PULLUP(GPIOH_PIN3) | \
|
|
PIN_PUPDR_PULLUP(GPIOH_PIN4) | \
|
|
PIN_PUPDR_PULLUP(GPIOH_PIN5) | \
|
|
PIN_PUPDR_PULLUP(GPIOH_PIN6) | \
|
|
PIN_PUPDR_PULLUP(GPIOH_PIN7) | \
|
|
PIN_PUPDR_PULLUP(GPIOH_PIN8) | \
|
|
PIN_PUPDR_PULLUP(GPIOH_PIN9) | \
|
|
PIN_PUPDR_PULLUP(GPIOH_PIN10) | \
|
|
PIN_PUPDR_PULLUP(GPIOH_PIN11) | \
|
|
PIN_PUPDR_PULLUP(GPIOH_PIN12) | \
|
|
PIN_PUPDR_PULLUP(GPIOH_PIN13) | \
|
|
PIN_PUPDR_PULLUP(GPIOH_PIN14) | \
|
|
PIN_PUPDR_PULLUP(GPIOH_PIN15))
|
|
#define VAL_GPIOH_ODR (PIN_ODR_HIGH(GPIOH_PIN0) | \
|
|
PIN_ODR_HIGH(GPIOH_PIN1) | \
|
|
PIN_ODR_HIGH(GPIOH_PIN2) | \
|
|
PIN_ODR_HIGH(GPIOH_PIN3) | \
|
|
PIN_ODR_HIGH(GPIOH_PIN4) | \
|
|
PIN_ODR_HIGH(GPIOH_PIN5) | \
|
|
PIN_ODR_HIGH(GPIOH_PIN6) | \
|
|
PIN_ODR_HIGH(GPIOH_PIN7) | \
|
|
PIN_ODR_HIGH(GPIOH_PIN8) | \
|
|
PIN_ODR_HIGH(GPIOH_PIN9) | \
|
|
PIN_ODR_HIGH(GPIOH_PIN10) | \
|
|
PIN_ODR_HIGH(GPIOH_PIN11) | \
|
|
PIN_ODR_HIGH(GPIOH_PIN12) | \
|
|
PIN_ODR_HIGH(GPIOH_PIN13) | \
|
|
PIN_ODR_HIGH(GPIOH_PIN14) | \
|
|
PIN_ODR_HIGH(GPIOH_PIN15))
|
|
#define VAL_GPIOH_AFRL (PIN_AFIO_AF(GPIOH_PIN0, 0) | \
|
|
PIN_AFIO_AF(GPIOH_PIN1, 0) | \
|
|
PIN_AFIO_AF(GPIOH_PIN2, 0) | \
|
|
PIN_AFIO_AF(GPIOH_PIN3, 0) | \
|
|
PIN_AFIO_AF(GPIOH_PIN4, 0) | \
|
|
PIN_AFIO_AF(GPIOH_PIN5, 0) | \
|
|
PIN_AFIO_AF(GPIOH_PIN6, 0) | \
|
|
PIN_AFIO_AF(GPIOH_PIN7, 0))
|
|
#define VAL_GPIOH_AFRH (PIN_AFIO_AF(GPIOH_PIN8, 0) | \
|
|
PIN_AFIO_AF(GPIOH_PIN9, 0) | \
|
|
PIN_AFIO_AF(GPIOH_PIN10, 0) | \
|
|
PIN_AFIO_AF(GPIOH_PIN11, 0) | \
|
|
PIN_AFIO_AF(GPIOH_PIN12, 0) | \
|
|
PIN_AFIO_AF(GPIOH_PIN13, 0) | \
|
|
PIN_AFIO_AF(GPIOH_PIN14, 0) | \
|
|
PIN_AFIO_AF(GPIOH_PIN15, 0))
|
|
|
|
|
|
/*
|
|
* USB bus activation macro, required by the USB driver.
|
|
*/
|
|
// #define usb_lld_connect_bus(usbp)
|
|
#define usb_lld_connect_bus(usbp) (palSetPadMode(GPIOA, GPIOA_USB_DP, PAL_MODE_ALTERNATE(14)))
|
|
// #define usb_lld_connect_bus(usbp) palSetPadMode(GPIOA, 12, PAL_MODE_INPUT)
|
|
/*
|
|
* USB bus de-activation macro, required by the USB driver.
|
|
*/
|
|
// #define usb_lld_disconnect_bus(usbp)
|
|
#define usb_lld_disconnect_bus(usbp) (palSetPadMode(GPIOA, GPIOA_USB_DP, PAL_MODE_OUTPUT_PUSHPULL)); palClearPad(GPIOA, GPIOA_USB_DP)
|
|
// #define usb_lld_disconnect_bus(usbp) palSetPadMode(GPIOA, 12, PAL_MODE_OUTPUT_PUSHPULL); palClearPad(GPIOA, 12)
|
|
|
|
#if !defined(_FROM_ASM_)
|
|
#ifdef __cplusplus
|
|
extern "C" {
|
|
#endif
|
|
void boardInit(void);
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
#endif /* _FROM_ASM_ */
|
|
|
|
#endif /* _BOARD_H_ */
|