mirror of
https://github.com/qmk/qmk_firmware.git
synced 2024-12-21 09:03:23 +00:00
8e96c5a060
Co-authored-by: James Young <18669334+noroadsleft@users.noreply.github.com>
238 lines
8.5 KiB
C
238 lines
8.5 KiB
C
/* Copyright 2017 Jason Williams
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* Copyright 2018 Jack Humbert
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* Copyright 2018 Yiancar
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "is31fl3733.h"
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#include "i2c_master.h"
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#include "wait.h"
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// This is a 7-bit address, that gets left-shifted and bit 0
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// set to 0 for write, 1 for read (as per I2C protocol)
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// The address will vary depending on your wiring:
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// 00 <-> GND
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// 01 <-> SCL
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// 10 <-> SDA
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// 11 <-> VCC
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// ADDR1 represents A1:A0 of the 7-bit address.
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// ADDR2 represents A3:A2 of the 7-bit address.
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// The result is: 0b101(ADDR2)(ADDR1)
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#define ISSI_ADDR_DEFAULT 0x50
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#define ISSI_COMMANDREGISTER 0xFD
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#define ISSI_COMMANDREGISTER_WRITELOCK 0xFE
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#define ISSI_INTERRUPTMASKREGISTER 0xF0
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#define ISSI_INTERRUPTSTATUSREGISTER 0xF1
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#define ISSI_PAGE_LEDCONTROL 0x00 // PG0
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#define ISSI_PAGE_PWM 0x01 // PG1
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#define ISSI_PAGE_AUTOBREATH 0x02 // PG2
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#define ISSI_PAGE_FUNCTION 0x03 // PG3
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#define ISSI_REG_CONFIGURATION 0x00 // PG3
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#define ISSI_REG_GLOBALCURRENT 0x01 // PG3
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#define ISSI_REG_RESET 0x11 // PG3
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#define ISSI_REG_SWPULLUP 0x0F // PG3
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#define ISSI_REG_CSPULLUP 0x10 // PG3
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#ifndef ISSI_TIMEOUT
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# define ISSI_TIMEOUT 100
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#endif
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#ifndef ISSI_PERSISTENCE
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# define ISSI_PERSISTENCE 0
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#endif
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// Transfer buffer for TWITransmitData()
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uint8_t g_twi_transfer_buffer[20];
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// These buffers match the IS31FL3733 PWM registers.
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// The control buffers match the PG0 LED On/Off registers.
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// Storing them like this is optimal for I2C transfers to the registers.
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// We could optimize this and take out the unused registers from these
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// buffers and the transfers in IS31FL3733_write_pwm_buffer() but it's
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// probably not worth the extra complexity.
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uint8_t g_pwm_buffer[DRIVER_COUNT][192];
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bool g_pwm_buffer_update_required[DRIVER_COUNT] = {false};
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uint8_t g_led_control_registers[DRIVER_COUNT][24] = {0};
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bool g_led_control_registers_update_required[DRIVER_COUNT] = {false};
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bool IS31FL3733_write_register(uint8_t addr, uint8_t reg, uint8_t data) {
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// If the transaction fails function returns false.
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g_twi_transfer_buffer[0] = reg;
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g_twi_transfer_buffer[1] = data;
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#if ISSI_PERSISTENCE > 0
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for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) {
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if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, ISSI_TIMEOUT) != 0) {
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return false;
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}
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}
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#else
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if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, ISSI_TIMEOUT) != 0) {
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return false;
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}
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#endif
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return true;
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}
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bool IS31FL3733_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) {
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// Assumes PG1 is already selected.
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// If any of the transactions fails function returns false.
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// Transmit PWM registers in 12 transfers of 16 bytes.
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// g_twi_transfer_buffer[] is 20 bytes
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// Iterate over the pwm_buffer contents at 16 byte intervals.
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for (int i = 0; i < 192; i += 16) {
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g_twi_transfer_buffer[0] = i;
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// Copy the data from i to i+15.
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// Device will auto-increment register for data after the first byte
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// Thus this sets registers 0x00-0x0F, 0x10-0x1F, etc. in one transfer.
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for (int j = 0; j < 16; j++) {
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g_twi_transfer_buffer[1 + j] = pwm_buffer[i + j];
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}
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#if ISSI_PERSISTENCE > 0
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for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) {
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if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, ISSI_TIMEOUT) != 0) {
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return false;
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}
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}
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#else
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if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, ISSI_TIMEOUT) != 0) {
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return false;
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}
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#endif
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}
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return true;
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}
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void IS31FL3733_init(uint8_t addr, uint8_t sync) {
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// In order to avoid the LEDs being driven with garbage data
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// in the LED driver's PWM registers, shutdown is enabled last.
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// Set up the mode and other settings, clear the PWM registers,
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// then disable software shutdown.
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// Sync is passed so set it according to the datasheet.
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// Unlock the command register.
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IS31FL3733_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5);
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// Select PG0
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IS31FL3733_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_LEDCONTROL);
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// Turn off all LEDs.
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for (int i = 0x00; i <= 0x17; i++) {
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IS31FL3733_write_register(addr, i, 0x00);
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}
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// Unlock the command register.
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IS31FL3733_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5);
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// Select PG1
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IS31FL3733_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_PWM);
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// Set PWM on all LEDs to 0
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// No need to setup Breath registers to PWM as that is the default.
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for (int i = 0x00; i <= 0xBF; i++) {
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IS31FL3733_write_register(addr, i, 0x00);
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}
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// Unlock the command register.
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IS31FL3733_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5);
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// Select PG3
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IS31FL3733_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_FUNCTION);
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// Set global current to maximum.
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IS31FL3733_write_register(addr, ISSI_REG_GLOBALCURRENT, 0xFF);
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// Disable software shutdown.
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IS31FL3733_write_register(addr, ISSI_REG_CONFIGURATION, (sync << 6) | 0x01);
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// Wait 10ms to ensure the device has woken up.
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wait_ms(10);
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}
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void IS31FL3733_set_color(int index, uint8_t red, uint8_t green, uint8_t blue) {
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if (index >= 0 && index < DRIVER_LED_TOTAL) {
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is31_led led = g_is31_leds[index];
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g_pwm_buffer[led.driver][led.r] = red;
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g_pwm_buffer[led.driver][led.g] = green;
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g_pwm_buffer[led.driver][led.b] = blue;
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g_pwm_buffer_update_required[led.driver] = true;
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}
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}
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void IS31FL3733_set_color_all(uint8_t red, uint8_t green, uint8_t blue) {
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for (int i = 0; i < DRIVER_LED_TOTAL; i++) {
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IS31FL3733_set_color(i, red, green, blue);
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}
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}
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void IS31FL3733_set_led_control_register(uint8_t index, bool red, bool green, bool blue) {
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is31_led led = g_is31_leds[index];
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uint8_t control_register_r = led.r / 8;
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uint8_t control_register_g = led.g / 8;
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uint8_t control_register_b = led.b / 8;
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uint8_t bit_r = led.r % 8;
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uint8_t bit_g = led.g % 8;
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uint8_t bit_b = led.b % 8;
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if (red) {
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g_led_control_registers[led.driver][control_register_r] |= (1 << bit_r);
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} else {
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g_led_control_registers[led.driver][control_register_r] &= ~(1 << bit_r);
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}
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if (green) {
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g_led_control_registers[led.driver][control_register_g] |= (1 << bit_g);
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} else {
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g_led_control_registers[led.driver][control_register_g] &= ~(1 << bit_g);
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}
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if (blue) {
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g_led_control_registers[led.driver][control_register_b] |= (1 << bit_b);
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} else {
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g_led_control_registers[led.driver][control_register_b] &= ~(1 << bit_b);
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}
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g_led_control_registers_update_required[led.driver] = true;
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}
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void IS31FL3733_update_pwm_buffers(uint8_t addr, uint8_t index) {
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if (g_pwm_buffer_update_required[index]) {
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// Firstly we need to unlock the command register and select PG1.
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IS31FL3733_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5);
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IS31FL3733_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_PWM);
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// If any of the transactions fail we risk writing dirty PG0,
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// refresh page 0 just in case.
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if (!IS31FL3733_write_pwm_buffer(addr, g_pwm_buffer[index])) {
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g_led_control_registers_update_required[index] = true;
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}
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}
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g_pwm_buffer_update_required[index] = false;
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}
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void IS31FL3733_update_led_control_registers(uint8_t addr, uint8_t index) {
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if (g_led_control_registers_update_required[index]) {
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// Firstly we need to unlock the command register and select PG0
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IS31FL3733_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5);
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IS31FL3733_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_LEDCONTROL);
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for (int i = 0; i < 24; i++) {
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IS31FL3733_write_register(addr, i, g_led_control_registers[index][i]);
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}
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}
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g_led_control_registers_update_required[index] = false;
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}
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