mirror of
https://github.com/qmk/qmk_firmware.git
synced 2024-12-16 14:43:24 +00:00
1646c0f26c
* Add Per Key functionality for AutoShift (#11536) * LED Matrix: Reactive effect buffers & advanced indicators (#12588) * [Keyboard] kint36: switch to sym_eager_pk debouncing (#12626) * [Keyboard] kint2pp: reduce input latency by ≈10ms (#12625) * LED Matrix: Split (#12633) * [CI] Format code according to conventions (#12650) * feat: infinite timeout for leader key (#6580) * feat: implement leader_no_timeout logic * docs(leader_key): infinite leader timeout docs * Format code according to conventions (#12680) * Update ADC driver for STM32F1xx, STM32F3xx, STM32F4xx (#12403) * Fix default ADC_RESOLUTION for ADCv3 (and ADCv4) Recent ChibiOS update removed ADC_CFGR1_RES_10BIT from the ADCv3 headers (that macro should not have been there, because ADCv3 has CFGR instead of CFGR1). Fix the default value for ADC_RESOLUTION to use ADC_CFGR_RES_10BITS if it is defined (that name is used for ADCv3 and ADCv4). * Update ADC docs to match the actually used resolution ADC driver for ChibiOS actually uses the 10-bit resolution by default (probably to match AVR); fix the documentation accordingly. Also add both ADC_CFGR_RES_10BITS and ADC_CFGR1_RES_10BIT constants (these names differ according to the ADC implementation in the particular MCU). * Fix pinToMux() for B12 and B13 on STM32F3xx Testing on STM32F303CCT6 revealed that the ADC mux values for B12 and B13 pins were wrong. * Add support for all possible analog pins on STM32F1xx Added ADC mux values for pins A0...A7, B0, B1, C0...C5 on STM32F1xx (they are the same at least for STM32F103x8 and larger F103 devices, and also F102, F105, F107 families). Actually tested on STM32F103C8T6 (therefore pins C0...C5 were not tested). Pins F6...F10, which are present on STM32F103x[C-G] in 144-pin packages, cannot be supported at the moment, because those pins are connected only to ADC3, but the ChibiOS ADC driver for STM32F1xx supports only ADC1. * Add support for all possible analog pins on STM32F4xx Added ADC mux values for pins A0...A7, B0, B1, C0...C5 and optionally F3...F10 (if STM32_ADC_USE_ADC3 is enabled). These mux values are apparently the same for all F4xx devices, except some smaller devices may not have ADC3. Actually tested on STM32F401CCU6, STM32F401CEU6, STM32F411CEU6 (using various WeAct “Blackpill” boards); only pins A0...A7, B0, B1 were tested. Pins F3...F10 are inside `#if STM32_ADC_USE_ADC3` because some devices which don't have ADC3 also don't have the GPIOF port, therefore the code which refers to Fx pins does not compile. * Fix STM32F3xx ADC mux table in documentation The ADC driver documentation had some errors in the mux table for STM32F3xx. Fix this table to match the datasheet and the actual code (mux settings for B12 and B13 were also tested on a real STM32F303CCT6 chip). * Add STM32F1xx ADC pins to the documentation * Add STM32F4xx ADC pins to the documentation * Add initial support for tinyuf2 bootloader (when hosted on F411 blackpill) (#12600) * Add support for jumping to tinyuf2 bootloader. Adds blackpill UF2 example. * Update flashing.md * Update chconf.h * Update config.h * Update halconf.h * Update mcuconf.h * eeprom driver: Refactor where eeprom driver initialisation (and EEPROM emulation initialisation) occurs to make it non-target-specific. (#12671) * Add support for MCU = STM32F446 (#12619) * Add support for MCU = STM32F446 * Update platforms/chibios/GENERIC_STM32_F446XE/configs/config.h * Restore mcuconf.h to the one used by RT-STM32F446RE-NUCLEO64 * stm32f446: update mcuconf.h and board.h for 16MHz operation, with USB enabled, and other peripherals disabled. * Format code according to conventions (#12682) * Format code according to conventions (#12687) * Add STM32L433 and L443 support (#12063) * initial L433 commit * change to XC * fix L433 * disable all peripherals * update system and peripheral clocks * 433 change * use its own board files * revert its own board files * l433 specific change * fix stm32l432xx define * remove duplicate #define * fix bootloader jump * move to L443xx and add i2c2, spi2, usart3 to mcuconf.h * move to L443 * move to L443 * fix sdmmc in mcuconf.h * include STM32L443 * add L443 * Include L443 in compatible microcontrollers * Include L443 in compatible microcontrollers * Update config bootloader jump description * Update ChibiOS define reasoning * Update quantum/mcu_selection.mk * fix git conflict * Updated Function96 with V2 files and removed chconf.h and halconf.h (#12613) * Fix bad PR merge for #6580. (#12721) * Change RGB/LED Matrix to use a simple define for USB suspend (#12697) * [CI] Format code according to conventions (#12731) * Fixing transport's led/rgb matrix suspend state logic (#12770) * [CI] Format code according to conventions (#12772) * Fix comment parsing (#12750) * Added OLED fade out support (#12086) * fix some references to bin/qmk that slipped in (#12832) * Resolve a number of warnings in `qmk generate-api` (#12833) * New command: qmk console (#12828) * stash poc * stash * tidy up implementation * Tidy up slightly for review * Tidy up slightly for review * Bodge environment to make tests pass * Refactor away from asyncio due to windows issues * Filter devices * align vid/pid printing * Add hidapi to the installers * start preparing for multiple hid_listeners * udev rules for hid_listen * refactor to move closer to end state * very basic implementation of the threaded model * refactor how vid/pid/index are supplied and parsed * windows improvements * read the report directly when usage page isn't available * add per-device colors, the choice to show names or numbers, and refactor * add timestamps * Add support for showing bootloaders * tweak the color for bootloaders * Align bootloader disconnect with connect color * add support for showing all bootloaders * fix the pyusb check * tweaks * fix exception * hide a stack trace behind -v * add --no-bootloaders option * add documentation for qmk console * Apply suggestions from code review * pyformat * clean up and flesh out KNOWN_BOOTLOADERS * Remove pointless SERIAL_LINK_ENABLE rules (#12846) * Make Swap Hands use PROGMEM (#12284) This converts the array that the Swap Hands feature uses to use PROGMEM, and to read from that array, as such. Since this array never changes at runtime, there is no reason to keep it in memory. Especially for AVR boards, as memory is a precious resource. * Fix another bin/qmk reference (#12856) * [Keymap] Turn OLED off on suspend in soundmonster keymap (#10419) * Fixup build errors on `develop` branch. (#12723) * LED Matrix: Effects! (#12651) * Fix syntax error when compiling for ARM (#12866) * Remove KEYMAP and LAYOUT_kc (#12160) * alias KEYMAP to LAYOUT * remove KEYMAP and LAYOUT_kc * Add setup, clone, and env to the list of commands we allow even with broken modules (#12868) * Rename `point_t` -> `led_point_t` (#12864) * [Keyboard] updated a vendor name / fixed minor keymap issues (#12881) * Add missing LED Matrix suspend code to suspend.c (#12878) * LED Matrix: Documentation (#12685) * Deprecate `send_unicode_hex_string()` (#12602) * Fix spelling mistake regarding LED Matrix in split_common. (#12888) * [Keymap] Fix QWERTY/DVORAK status output for kzar keymap (#12895) * Use milc.subcommand.config instead of qmk.cli.config (#12915) * Use milc.subcommand.config instead * pyformat * remove the config test * Add function to allow repeated blinking of one layer (#12237) * Implement function rgblight_blink_layer_repeat to allow repeated blinking of one layer at a time * Update doc * Rework rgblight blinking according to requested change * optimize storage * Fixup housekeeping from being invoked twice per loop. (#12933) * matrix: wait for row signal to go HIGH for every row (#12945) I noticed this discrepancy (last row of the matrix treated differently than the others) when optimizing the input latency of my keyboard controller, see also https://michael.stapelberg.ch/posts/2021-05-08-keyboard-input-latency-qmk-kinesis/ Before this commit, when tuning the delays I noticed ghost key presses when pressing the F2 key, which is on the last row of the keyboard matrix: the dead_grave key, which is on the first row of the keyboard matrix, would be incorrectly detected as pressed. After this commit, all keyboard matrix rows are interpreted correctly. I suspect that my setup is more susceptible to this nuance than others because I use GPIO_INPUT_PIN_DELAY=0 and hence don’t have another delay that might mask the problem. * ensure we do not conflict with existing keymap aliases (#12976) * Add support for up to 4 IS31FL3733 drivers (#12342) * Convert Encoder callbacks to be boolean functions (#12805) * [Keyboard] Fix Terrazzo build failure (#12977) * Do not hard set config in CPTC files (#11864) * [Keyboard] Corne - Remove legacy revision support (#12226) * [Keymap] Update to Drashna keymap and user code (based on develop) (#12936) * Add Full-duplex serial driver for ARM boards (#9842) * Document LED_MATRIX_FRAMEBUFFER_EFFECTS (#12987) * Backlight: add defines for default level and breathing state (#12560) * Add dire message about LUFA mass storage bootloader (#13014) * [Keyboard] Remove redundant legacy and common headers for crkbd (#13023) Was causing compiler errors on some systems. * Fix keyboards/keymaps for boolean encoder callback changes (#12985) * `backlight.c`: include `eeprom.h` (#13024) * Add changelog for 2021-05-29 Breaking Changes merge (#12939) * Add ChangeLog for 2021-05-29 Breaking Changes Merge: initial version * Add recent develop changes * Sort recent develop changes * Remove sections for ChibiOS changes per tzarc No ChibiOS changes this round. * Add and sort recent develop changes * add notes about keyboard moves/deletions * import changelog for PR 12172 Documents the change to BOOTMAGIC_ENABLE. * update section headings * re-sort changelog * add additional note regarding Bootmagic changes * remove changelog timestamp * update dates in main Breaking Changes docs * fix broken section anchors in previous changelogs * add link to backlight/eeprom patch to changelog * highlight some more changes * link PRs from section headers * Restore standard readme * run: qmk cformat --core-only
177 lines
6.2 KiB
C
177 lines
6.2 KiB
C
/*
|
|
ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
|
|
|
|
Licensed under the Apache License, Version 2.0 (the "License");
|
|
you may not use this file except in compliance with the License.
|
|
You may obtain a copy of the License at
|
|
|
|
http://www.apache.org/licenses/LICENSE-2.0
|
|
|
|
Unless required by applicable law or agreed to in writing, software
|
|
distributed under the License is distributed on an "AS IS" BASIS,
|
|
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
|
See the License for the specific language governing permissions and
|
|
limitations under the License.
|
|
*/
|
|
|
|
#ifndef _MCUCONF_H_
|
|
#define _MCUCONF_H_
|
|
|
|
/*
|
|
* STM32F0xx drivers configuration.
|
|
* The following settings override the default settings present in
|
|
* the various device driver implementation headers.
|
|
* Note that the settings for each driver only have effect if the whole
|
|
* driver is enabled in halconf.h.
|
|
*
|
|
* IRQ priorities:
|
|
* 3...0 Lowest...Highest.
|
|
*
|
|
* DMA priorities:
|
|
* 0...3 Lowest...Highest.
|
|
*/
|
|
|
|
#define STM32F0xx_MCUCONF
|
|
// #define STM32F070xB
|
|
|
|
/*
|
|
* HAL driver system settings.
|
|
*/
|
|
#define STM32_NO_INIT FALSE
|
|
#define STM32_PVD_ENABLE FALSE
|
|
#define STM32_PLS STM32_PLS_LEV0
|
|
#define STM32_HSI_ENABLED TRUE
|
|
#define STM32_HSI14_ENABLED TRUE
|
|
#define STM32_HSI48_ENABLED FALSE
|
|
#define STM32_LSI_ENABLED TRUE
|
|
#define STM32_HSE_ENABLED TRUE
|
|
#define STM32_LSE_ENABLED FALSE
|
|
#define STM32_SW STM32_SW_PLL
|
|
#define STM32_PLLSRC STM32_PLLSRC_HSE
|
|
#define STM32_PREDIV_VALUE 1
|
|
#define STM32_PLLMUL_VALUE 4
|
|
#define STM32_HPRE STM32_HPRE_DIV1
|
|
#define STM32_PPRE STM32_PPRE_DIV1
|
|
#define STM32_ADCSW STM32_ADCSW_HSI14
|
|
#define STM32_ADCPRE STM32_ADCPRE_DIV4
|
|
#define STM32_MCOSEL STM32_MCOSEL_SYSCLK
|
|
#define STM32_ADCPRE STM32_ADCPRE_DIV4
|
|
#define STM32_ADCSW STM32_ADCSW_HSI14
|
|
#define STM32_USBSW STM32_USBSW_PCLK
|
|
#define STM32_CECSW STM32_CECSW_HSI
|
|
#define STM32_I2C1SW STM32_I2C1SW_SYSCLK
|
|
#define STM32_USART1SW STM32_USART1SW_PCLK
|
|
#define STM32_RTCSEL STM32_RTCSEL_LSI
|
|
|
|
/*
|
|
* ADC driver system settings.
|
|
*/
|
|
#define STM32_ADC_USE_ADC1 FALSE
|
|
#define STM32_ADC_ADC1_DMA_PRIORITY 2
|
|
#define STM32_ADC_IRQ_PRIORITY 2
|
|
#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 2
|
|
|
|
/*
|
|
* EXT driver system settings.
|
|
*/
|
|
#define STM32_EXT_EXTI0_1_IRQ_PRIORITY 3
|
|
#define STM32_EXT_EXTI2_3_IRQ_PRIORITY 3
|
|
#define STM32_EXT_EXTI4_15_IRQ_PRIORITY 3
|
|
#define STM32_EXT_EXTI16_IRQ_PRIORITY 3
|
|
#define STM32_EXT_EXTI17_IRQ_PRIORITY 3
|
|
|
|
/*
|
|
* GPT driver system settings.
|
|
*/
|
|
#define STM32_GPT_USE_TIM1 FALSE
|
|
#define STM32_GPT_USE_TIM2 FALSE
|
|
#define STM32_GPT_USE_TIM3 FALSE
|
|
#define STM32_GPT_USE_TIM14 FALSE
|
|
#define STM32_GPT_TIM1_IRQ_PRIORITY 2
|
|
#define STM32_GPT_TIM2_IRQ_PRIORITY 2
|
|
#define STM32_GPT_TIM3_IRQ_PRIORITY 2
|
|
#define STM32_GPT_TIM14_IRQ_PRIORITY 2
|
|
|
|
/*
|
|
* I2C driver system settings.
|
|
*/
|
|
#define STM32_I2C_USE_I2C1 TRUE
|
|
#define STM32_I2C_USE_I2C2 FALSE
|
|
#define STM32_I2C_BUSY_TIMEOUT 50
|
|
#define STM32_I2C_I2C1_IRQ_PRIORITY 3
|
|
#define STM32_I2C_I2C2_IRQ_PRIORITY 3
|
|
#define STM32_I2C_USE_DMA TRUE
|
|
#define STM32_I2C_I2C1_DMA_PRIORITY 1
|
|
#define STM32_I2C_I2C2_DMA_PRIORITY 1
|
|
#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
|
|
#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
|
|
#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
|
|
|
|
/*
|
|
* ICU driver system settings.
|
|
*/
|
|
#define STM32_ICU_USE_TIM1 FALSE
|
|
#define STM32_ICU_USE_TIM2 FALSE
|
|
#define STM32_ICU_USE_TIM3 FALSE
|
|
#define STM32_ICU_TIM1_IRQ_PRIORITY 3
|
|
#define STM32_ICU_TIM2_IRQ_PRIORITY 3
|
|
#define STM32_ICU_TIM3_IRQ_PRIORITY 3
|
|
|
|
/*
|
|
* PWM driver system settings.
|
|
*/
|
|
#define STM32_PWM_USE_ADVANCED FALSE
|
|
#define STM32_PWM_USE_TIM1 FALSE
|
|
#define STM32_PWM_USE_TIM2 FALSE
|
|
#define STM32_PWM_USE_TIM3 FALSE
|
|
#define STM32_PWM_TIM1_IRQ_PRIORITY 3
|
|
#define STM32_PWM_TIM2_IRQ_PRIORITY 3
|
|
#define STM32_PWM_TIM3_IRQ_PRIORITY 3
|
|
|
|
/*
|
|
* SERIAL driver system settings.
|
|
*/
|
|
#define STM32_SERIAL_USE_USART1 FALSE
|
|
#define STM32_SERIAL_USE_USART2 FALSE
|
|
#define STM32_SERIAL_USART1_PRIORITY 3
|
|
#define STM32_SERIAL_USART2_PRIORITY 3
|
|
|
|
/*
|
|
* SPI driver system settings.
|
|
*/
|
|
#define STM32_SPI_USE_SPI1 FALSE
|
|
#define STM32_SPI_USE_SPI2 FALSE
|
|
#define STM32_SPI_SPI1_DMA_PRIORITY 1
|
|
#define STM32_SPI_SPI2_DMA_PRIORITY 1
|
|
#define STM32_SPI_SPI1_IRQ_PRIORITY 2
|
|
#define STM32_SPI_SPI2_IRQ_PRIORITY 2
|
|
#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
|
|
#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
|
|
#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure")
|
|
|
|
/*
|
|
* ST driver system settings.
|
|
*/
|
|
#define STM32_ST_IRQ_PRIORITY 2
|
|
#define STM32_ST_USE_TIMER 3
|
|
|
|
/*
|
|
* UART driver system settings.
|
|
*/
|
|
#define STM32_UART_USE_USART1 FALSE
|
|
#define STM32_UART_USE_USART2 FALSE
|
|
#define STM32_UART_USART1_IRQ_PRIORITY 3
|
|
#define STM32_UART_USART2_IRQ_PRIORITY 3
|
|
#define STM32_UART_USART1_DMA_PRIORITY 0
|
|
#define STM32_UART_USART2_DMA_PRIORITY 0
|
|
#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure")
|
|
|
|
/*
|
|
* USB driver system settings.
|
|
*/
|
|
#define STM32_USB_USE_USB1 TRUE
|
|
#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE
|
|
#define STM32_USB_USB1_LP_IRQ_PRIORITY 3
|
|
|
|
#endif /* _MCUCONF_H_ */
|