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https://github.com/qmk/qmk_firmware.git
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74 lines
3.2 KiB
C
74 lines
3.2 KiB
C
/* Copyright 2021 QMK
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#pragma once
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// Need to disable GCC's "maybe-uninitialized" warning for this file, as it causes issues when running `KEEP_INTERMEDIATES=yes`.
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#pragma GCC diagnostic push
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#pragma GCC diagnostic ignored "-Wmaybe-uninitialized"
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#include <util/delay.h>
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#pragma GCC diagnostic pop
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// http://ww1.microchip.com/downloads/en/devicedoc/atmel-0856-avr-instruction-set-manual.pdf
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// page 22: Table 4-2. Arithmetic and Logic Instructions
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/*
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for (uint16_t i = times; i > 0; i--) {
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__builtin_avr_delay_cycles(1);
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}
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.L3: sbiw r24,0 // loop step 1
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brne .L4 // loop step 2
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ret
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.L4: nop // __builtin_avr_delay_cycles(1);
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sbiw r24,1 // loop step 3
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rjmp .L3 // loop step 4
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*/
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#define AVR_sbiw_clocks 2
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#define AVR_rjmp_clocks 2
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#define AVR_brne_clocks 2
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#define AVR_WAIT_LOOP_OVERHEAD (AVR_sbiw_clocks + AVR_brne_clocks + AVR_sbiw_clocks + AVR_rjmp_clocks)
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#define wait_ms(ms) \
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do { \
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if (__builtin_constant_p(ms)) { \
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_delay_ms(ms); \
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} else { \
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for (uint16_t i = ms; i > 0; i--) { \
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_delay_ms(1); \
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} \
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} \
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} while (0)
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#define wait_us(us) \
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do { \
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if (__builtin_constant_p(us)) { \
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_delay_us(us); \
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} else { \
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for (uint16_t i = us; i > 0; i--) { \
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__builtin_avr_delay_cycles((F_CPU / 1000000) - AVR_WAIT_LOOP_OVERHEAD); \
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} \
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} \
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} while (0)
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#define wait_cpuclock(n) __builtin_avr_delay_cycles(n)
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#define CPU_CLOCK F_CPU
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/* The AVR series GPIOs have a one clock read delay for changes in the digital input signal.
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* But here's more margin to make it two clocks. */
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#ifndef GPIO_INPUT_PIN_DELAY
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# define GPIO_INPUT_PIN_DELAY 2
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#endif
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#define waitInputPinDelay() wait_cpuclock(GPIO_INPUT_PIN_DELAY)
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