mirror of https://github.com/qmk/qmk_firmware
115 lines
5.5 KiB
C
115 lines
5.5 KiB
C
// Copyright 2024 Fernando Birra
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// SPDX-License-Identifier: GPL-2.0-or-later
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#include "qp_internal.h"
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#include "qp_comms.h"
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#include "qp_gc9107.h"
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#include "qp_gc9xxx_opcodes.h"
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#include "qp_gc9107_opcodes.h"
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#include "qp_tft_panel.h"
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////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
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// Driver storage
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////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
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tft_panel_dc_reset_painter_device_t gc9107_drivers[GC9107_NUM_DEVICES] = {0};
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////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
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// Initialization
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////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
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__attribute__((weak)) bool qp_gc9107_init(painter_device_t device, painter_rotation_t rotation) {
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// A lot of these "unknown" opcodes are sourced from other OSS projects and are seemingly required for this display to function.
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// clang-format off
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const uint8_t gc9107_init_sequence[] = {
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GC9XXX_SET_INTER_REG_ENABLE1, 5, 0,
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GC9XXX_SET_INTER_REG_ENABLE2, 5, 0,
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GC9107_SET_FUNCTION_CTL6, 0, 1, GC9107_ALLOW_SET_COMPLEMENT_RGB | 0x08 | GC9107_ALLOW_SET_FRAMERATE,
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GC9107_SET_COMPLEMENT_RGB, 0, 1, GC9107_COMPLEMENT_WITH_LSB,
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0xAB, 0, 1, 0x0E,
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GC9107_SET_FRAME_RATE, 0, 1, 0x19,
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GC9XXX_SET_PIXEL_FORMAT, 0, 1, GC9107_PIXEL_FORMAT_16_BPP_IFPF,
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GC9XXX_CMD_SLEEP_OFF, 120, 0,
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GC9XXX_CMD_DISPLAY_ON, 20, 0
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};
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// clang-format on
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qp_comms_bulk_command_sequence(device, gc9107_init_sequence, sizeof(gc9107_init_sequence));
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// Configure the rotation (i.e. the ordering and direction of memory writes in GRAM)
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const uint8_t madctl[] = {
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[QP_ROTATION_0] = GC9XXX_MADCTL_BGR,
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[QP_ROTATION_90] = GC9XXX_MADCTL_BGR | GC9XXX_MADCTL_MX | GC9XXX_MADCTL_MV,
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[QP_ROTATION_180] = GC9XXX_MADCTL_BGR | GC9XXX_MADCTL_MX | GC9XXX_MADCTL_MY,
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[QP_ROTATION_270] = GC9XXX_MADCTL_BGR | GC9XXX_MADCTL_MV | GC9XXX_MADCTL_MY,
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};
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qp_comms_command_databyte(device, GC9XXX_SET_MEM_ACS_CTL, madctl[rotation]);
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return true;
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}
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////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
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// Driver vtable
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////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
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const tft_panel_dc_reset_painter_driver_vtable_t gc9107_driver_vtable = {
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.base =
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{
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.init = qp_gc9107_init,
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.power = qp_tft_panel_power,
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.clear = qp_tft_panel_clear,
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.flush = qp_tft_panel_flush,
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.pixdata = qp_tft_panel_pixdata,
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.viewport = qp_tft_panel_viewport,
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.palette_convert = qp_tft_panel_palette_convert_rgb565_swapped,
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.append_pixels = qp_tft_panel_append_pixels_rgb565,
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.append_pixdata = qp_tft_panel_append_pixdata,
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},
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.num_window_bytes = 2,
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.swap_window_coords = false,
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.opcodes =
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{
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.display_on = GC9XXX_CMD_DISPLAY_ON,
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.display_off = GC9XXX_CMD_DISPLAY_OFF,
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.set_column_address = GC9XXX_SET_COL_ADDR,
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.set_row_address = GC9XXX_SET_ROW_ADDR,
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.enable_writes = GC9XXX_SET_MEM,
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},
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};
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#ifdef QUANTUM_PAINTER_GC9107_SPI_ENABLE
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// Factory function for creating a handle to the GC9107 device
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painter_device_t qp_gc9107_make_spi_device(uint16_t panel_width, uint16_t panel_height, pin_t chip_select_pin, pin_t dc_pin, pin_t reset_pin, uint16_t spi_divisor, int spi_mode) {
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for (uint32_t i = 0; i < GC9107_NUM_DEVICES; ++i) {
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tft_panel_dc_reset_painter_device_t *driver = &gc9107_drivers[i];
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if (!driver->base.driver_vtable) {
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driver->base.driver_vtable = (const painter_driver_vtable_t *)&gc9107_driver_vtable;
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driver->base.comms_vtable = (const painter_comms_vtable_t *)&spi_comms_with_dc_vtable;
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driver->base.native_bits_per_pixel = 16; // RGB565
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driver->base.panel_width = panel_width;
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driver->base.panel_height = panel_height;
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driver->base.rotation = QP_ROTATION_0;
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driver->base.offset_x = 2;
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driver->base.offset_y = 1;
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// SPI and other pin configuration
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driver->base.comms_config = &driver->spi_dc_reset_config;
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driver->spi_dc_reset_config.spi_config.chip_select_pin = chip_select_pin;
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driver->spi_dc_reset_config.spi_config.divisor = spi_divisor;
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driver->spi_dc_reset_config.spi_config.lsb_first = false;
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driver->spi_dc_reset_config.spi_config.mode = spi_mode;
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driver->spi_dc_reset_config.dc_pin = dc_pin;
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driver->spi_dc_reset_config.reset_pin = reset_pin;
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driver->spi_dc_reset_config.command_params_uses_command_pin = false;
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if (!qp_internal_register_device((painter_device_t)driver)) {
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memset(driver, 0, sizeof(tft_panel_dc_reset_painter_device_t));
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return NULL;
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}
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return (painter_device_t)driver;
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}
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}
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return NULL;
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}
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#endif // QUANTUM_PAINTER_GC9107_SPI_ENABLE
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