mirror of
https://github.com/qmk/qmk_firmware.git
synced 2024-11-24 20:32:58 +00:00
LED drivers: remove PWM register offsets (#22897)
This commit is contained in:
parent
db8c254d3d
commit
eb7ecae4b4
@ -90,11 +90,11 @@ void is31fl3218_set_value(int index, uint8_t value) {
|
||||
if (index >= 0 && index < IS31FL3218_LED_COUNT) {
|
||||
memcpy_P(&led, (&g_is31fl3218_leds[index]), sizeof(led));
|
||||
|
||||
if (g_pwm_buffer[led.v - IS31FL3218_REG_PWM] == value) {
|
||||
if (g_pwm_buffer[led.v] == value) {
|
||||
return;
|
||||
}
|
||||
|
||||
g_pwm_buffer[led.v - IS31FL3218_REG_PWM] = value;
|
||||
g_pwm_buffer[led.v] = value;
|
||||
g_pwm_buffer_update_required = true;
|
||||
}
|
||||
}
|
||||
@ -109,8 +109,8 @@ void is31fl3218_set_led_control_register(uint8_t index, bool value) {
|
||||
is31fl3218_led_t led;
|
||||
memcpy_P(&led, (&g_is31fl3218_leds[index]), sizeof(led));
|
||||
|
||||
uint8_t control_register = (led.v - IS31FL3218_REG_PWM) / 6;
|
||||
uint8_t bit_value = (led.v - IS31FL3218_REG_PWM) % 6;
|
||||
uint8_t control_register = led.v / 6;
|
||||
uint8_t bit_value = led.v % 6;
|
||||
|
||||
if (value) {
|
||||
g_led_control_registers[control_register] |= (1 << bit_value);
|
||||
@ -133,7 +133,7 @@ void is31fl3218_update_pwm_buffers(void) {
|
||||
|
||||
void is31fl3218_update_led_control_registers(void) {
|
||||
if (g_led_control_registers_update_required) {
|
||||
for (int i = 0; i < IS31FL3218_LED_CONTROL_REGISTER_COUNT; i++) {
|
||||
for (uint8_t i = 0; i < IS31FL3218_LED_CONTROL_REGISTER_COUNT; i++) {
|
||||
is31fl3218_write_register(IS31FL3218_REG_LED_CONTROL_1 + i, g_led_control_registers[i]);
|
||||
}
|
||||
|
||||
|
@ -55,21 +55,21 @@ void is31fl3218_update_pwm_buffers(void);
|
||||
|
||||
void is31fl3218_update_led_control_registers(void);
|
||||
|
||||
#define OUT1 0x01
|
||||
#define OUT2 0x02
|
||||
#define OUT3 0x03
|
||||
#define OUT4 0x04
|
||||
#define OUT5 0x05
|
||||
#define OUT6 0x06
|
||||
#define OUT7 0x07
|
||||
#define OUT8 0x08
|
||||
#define OUT9 0x09
|
||||
#define OUT10 0x0A
|
||||
#define OUT11 0x0B
|
||||
#define OUT12 0x0C
|
||||
#define OUT13 0x0D
|
||||
#define OUT14 0x0E
|
||||
#define OUT15 0x0F
|
||||
#define OUT16 0x10
|
||||
#define OUT17 0x11
|
||||
#define OUT18 0x12
|
||||
#define OUT1 0x00
|
||||
#define OUT2 0x01
|
||||
#define OUT3 0x02
|
||||
#define OUT4 0x03
|
||||
#define OUT5 0x04
|
||||
#define OUT6 0x05
|
||||
#define OUT7 0x06
|
||||
#define OUT8 0x07
|
||||
#define OUT9 0x08
|
||||
#define OUT10 0x09
|
||||
#define OUT11 0x0A
|
||||
#define OUT12 0x0B
|
||||
#define OUT13 0x0C
|
||||
#define OUT14 0x0D
|
||||
#define OUT15 0x0E
|
||||
#define OUT16 0x0F
|
||||
#define OUT17 0x10
|
||||
#define OUT18 0x11
|
||||
|
@ -90,13 +90,13 @@ void is31fl3218_set_color(int index, uint8_t red, uint8_t green, uint8_t blue) {
|
||||
if (index >= 0 && index < IS31FL3218_LED_COUNT) {
|
||||
memcpy_P(&led, (&g_is31fl3218_leds[index]), sizeof(led));
|
||||
|
||||
if (g_pwm_buffer[led.r - IS31FL3218_REG_PWM] == red && g_pwm_buffer[led.g - IS31FL3218_REG_PWM] == green && g_pwm_buffer[led.b - IS31FL3218_REG_PWM] == blue) {
|
||||
if (g_pwm_buffer[led.r] == red && g_pwm_buffer[led.g] == green && g_pwm_buffer[led.b] == blue) {
|
||||
return;
|
||||
}
|
||||
|
||||
g_pwm_buffer[led.r - IS31FL3218_REG_PWM] = red;
|
||||
g_pwm_buffer[led.g - IS31FL3218_REG_PWM] = green;
|
||||
g_pwm_buffer[led.b - IS31FL3218_REG_PWM] = blue;
|
||||
g_pwm_buffer[led.r] = red;
|
||||
g_pwm_buffer[led.g] = green;
|
||||
g_pwm_buffer[led.b] = blue;
|
||||
g_pwm_buffer_update_required = true;
|
||||
}
|
||||
}
|
||||
@ -111,12 +111,12 @@ void is31fl3218_set_led_control_register(uint8_t index, bool red, bool green, bo
|
||||
is31fl3218_led_t led;
|
||||
memcpy_P(&led, (&g_is31fl3218_leds[index]), sizeof(led));
|
||||
|
||||
uint8_t control_register_r = (led.r - IS31FL3218_REG_PWM) / 6;
|
||||
uint8_t control_register_g = (led.g - IS31FL3218_REG_PWM) / 6;
|
||||
uint8_t control_register_b = (led.b - IS31FL3218_REG_PWM) / 6;
|
||||
uint8_t bit_r = (led.r - IS31FL3218_REG_PWM) % 6;
|
||||
uint8_t bit_g = (led.g - IS31FL3218_REG_PWM) % 6;
|
||||
uint8_t bit_b = (led.b - IS31FL3218_REG_PWM) % 6;
|
||||
uint8_t control_register_r = led.r / 6;
|
||||
uint8_t control_register_g = led.g / 6;
|
||||
uint8_t control_register_b = led.b / 6;
|
||||
uint8_t bit_r = led.r % 6;
|
||||
uint8_t bit_g = led.g % 6;
|
||||
uint8_t bit_b = led.b % 6;
|
||||
|
||||
if (red) {
|
||||
g_led_control_registers[control_register_r] |= (1 << bit_r);
|
||||
@ -149,7 +149,7 @@ void is31fl3218_update_pwm_buffers(void) {
|
||||
|
||||
void is31fl3218_update_led_control_registers(void) {
|
||||
if (g_led_control_registers_update_required) {
|
||||
for (int i = 0; i < IS31FL3218_LED_CONTROL_REGISTER_COUNT; i++) {
|
||||
for (uint8_t i = 0; i < IS31FL3218_LED_CONTROL_REGISTER_COUNT; i++) {
|
||||
is31fl3218_write_register(IS31FL3218_REG_LED_CONTROL_1 + i, g_led_control_registers[i]);
|
||||
}
|
||||
|
||||
|
@ -57,21 +57,21 @@ void is31fl3218_update_pwm_buffers(void);
|
||||
|
||||
void is31fl3218_update_led_control_registers(void);
|
||||
|
||||
#define OUT1 0x01
|
||||
#define OUT2 0x02
|
||||
#define OUT3 0x03
|
||||
#define OUT4 0x04
|
||||
#define OUT5 0x05
|
||||
#define OUT6 0x06
|
||||
#define OUT7 0x07
|
||||
#define OUT8 0x08
|
||||
#define OUT9 0x09
|
||||
#define OUT10 0x0A
|
||||
#define OUT11 0x0B
|
||||
#define OUT12 0x0C
|
||||
#define OUT13 0x0D
|
||||
#define OUT14 0x0E
|
||||
#define OUT15 0x0F
|
||||
#define OUT16 0x10
|
||||
#define OUT17 0x11
|
||||
#define OUT18 0x12
|
||||
#define OUT1 0x00
|
||||
#define OUT2 0x01
|
||||
#define OUT3 0x02
|
||||
#define OUT4 0x03
|
||||
#define OUT5 0x04
|
||||
#define OUT6 0x05
|
||||
#define OUT7 0x06
|
||||
#define OUT8 0x07
|
||||
#define OUT9 0x08
|
||||
#define OUT10 0x09
|
||||
#define OUT11 0x0A
|
||||
#define OUT12 0x0B
|
||||
#define OUT13 0x0C
|
||||
#define OUT14 0x0D
|
||||
#define OUT15 0x0E
|
||||
#define OUT16 0x0F
|
||||
#define OUT17 0x10
|
||||
#define OUT18 0x11
|
||||
|
@ -65,10 +65,10 @@ void is31fl3731_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) {
|
||||
for (uint8_t i = 0; i < IS31FL3731_PWM_REGISTER_COUNT; i += 16) {
|
||||
#if IS31FL3731_I2C_PERSISTENCE > 0
|
||||
for (uint8_t j = 0; j < IS31FL3731_I2C_PERSISTENCE; j++) {
|
||||
if (i2c_writeReg(addr << 1, 0x24 + i, pwm_buffer + i, 16, IS31FL3731_I2C_TIMEOUT) == I2C_STATUS_SUCCESS) break;
|
||||
if (i2c_writeReg(addr << 1, IS31FL3731_FRAME_REG_PWM + i, pwm_buffer + i, 16, IS31FL3731_I2C_TIMEOUT) == I2C_STATUS_SUCCESS) break;
|
||||
}
|
||||
#else
|
||||
i2c_writeReg(addr << 1, 0x24 + i, pwm_buffer + i, 16, IS31FL3731_I2C_TIMEOUT);
|
||||
i2c_writeReg(addr << 1, IS31FL3731_FRAME_REG_PWM + i, pwm_buffer + i, 16, IS31FL3731_I2C_TIMEOUT);
|
||||
#endif
|
||||
}
|
||||
}
|
||||
@ -130,18 +130,18 @@ void is31fl3731_init(uint8_t addr) {
|
||||
is31fl3731_select_page(addr, IS31FL3731_COMMAND_FRAME_1);
|
||||
|
||||
// turn off all LEDs in the LED control register
|
||||
for (int i = 0; i < IS31FL3731_LED_CONTROL_REGISTER_COUNT; i++) {
|
||||
is31fl3731_write_register(addr, i, 0x00);
|
||||
for (uint8_t i = 0; i < IS31FL3731_LED_CONTROL_REGISTER_COUNT; i++) {
|
||||
is31fl3731_write_register(addr, IS31FL3731_FRAME_REG_LED_CONTROL + i, 0x00);
|
||||
}
|
||||
|
||||
// turn off all LEDs in the blink control register (not really needed)
|
||||
for (int i = 0x12; i <= 0x23; i++) {
|
||||
is31fl3731_write_register(addr, i, 0x00);
|
||||
for (uint8_t i = 0; i < IS31FL3731_LED_CONTROL_REGISTER_COUNT; i++) {
|
||||
is31fl3731_write_register(addr, IS31FL3731_FRAME_REG_BLINK_CONTROL + i, 0x00);
|
||||
}
|
||||
|
||||
// set PWM on all LEDs to 0
|
||||
for (int i = 0x24; i <= 0xB3; i++) {
|
||||
is31fl3731_write_register(addr, i, 0x00);
|
||||
for (uint8_t i = 0; i < IS31FL3731_PWM_REGISTER_COUNT; i++) {
|
||||
is31fl3731_write_register(addr, IS31FL3731_FRAME_REG_PWM + i, 0x00);
|
||||
}
|
||||
|
||||
is31fl3731_select_page(addr, IS31FL3731_COMMAND_FUNCTION);
|
||||
@ -161,12 +161,11 @@ void is31fl3731_set_value(int index, uint8_t value) {
|
||||
if (index >= 0 && index < IS31FL3731_LED_COUNT) {
|
||||
memcpy_P(&led, (&g_is31fl3731_leds[index]), sizeof(led));
|
||||
|
||||
// Subtract 0x24 to get the second index of g_pwm_buffer
|
||||
if (g_pwm_buffer[led.driver][led.v - 0x24] == value) {
|
||||
if (g_pwm_buffer[led.driver][led.v] == value) {
|
||||
return;
|
||||
}
|
||||
|
||||
g_pwm_buffer[led.driver][led.v - 0x24] = value;
|
||||
g_pwm_buffer[led.driver][led.v] = value;
|
||||
g_pwm_buffer_update_required[led.driver] = true;
|
||||
}
|
||||
}
|
||||
@ -181,8 +180,8 @@ void is31fl3731_set_led_control_register(uint8_t index, bool value) {
|
||||
is31fl3731_led_t led;
|
||||
memcpy_P(&led, (&g_is31fl3731_leds[index]), sizeof(led));
|
||||
|
||||
uint8_t control_register = (led.v - 0x24) / 8;
|
||||
uint8_t bit_value = (led.v - 0x24) % 8;
|
||||
uint8_t control_register = led.v / 8;
|
||||
uint8_t bit_value = led.v % 8;
|
||||
|
||||
if (value) {
|
||||
g_led_control_registers[led.driver][control_register] |= (1 << bit_value);
|
||||
@ -203,7 +202,7 @@ void is31fl3731_update_pwm_buffers(uint8_t addr, uint8_t index) {
|
||||
|
||||
void is31fl3731_update_led_control_registers(uint8_t addr, uint8_t index) {
|
||||
if (g_led_control_registers_update_required[index]) {
|
||||
for (int i = 0; i < IS31FL3731_LED_CONTROL_REGISTER_COUNT; i++) {
|
||||
for (uint8_t i = 0; i < IS31FL3731_LED_CONTROL_REGISTER_COUNT; i++) {
|
||||
is31fl3731_write_register(addr, i, g_led_control_registers[index][i]);
|
||||
}
|
||||
|
||||
|
@ -61,6 +61,10 @@
|
||||
#define IS31FL3731_COMMAND_FRAME_8 0x07
|
||||
#define IS31FL3731_COMMAND_FUNCTION 0x0B
|
||||
|
||||
#define IS31FL3731_FRAME_REG_LED_CONTROL 0x00
|
||||
#define IS31FL3731_FRAME_REG_BLINK_CONTROL 0x12
|
||||
#define IS31FL3731_FRAME_REG_PWM 0x24
|
||||
|
||||
#define IS31FL3731_FUNCTION_REG_CONFIG 0x00
|
||||
#define IS31FL3731_CONFIG_MODE_PICTURE 0x00
|
||||
#define IS31FL3731_CONFIG_MODE_AUTO_PLAY 0x08
|
||||
@ -120,164 +124,164 @@ void is31fl3731_update_led_control_registers(uint8_t addr, uint8_t index);
|
||||
|
||||
void is31fl3731_flush(void);
|
||||
|
||||
#define C1_1 0x24
|
||||
#define C1_2 0x25
|
||||
#define C1_3 0x26
|
||||
#define C1_4 0x27
|
||||
#define C1_5 0x28
|
||||
#define C1_6 0x29
|
||||
#define C1_7 0x2A
|
||||
#define C1_8 0x2B
|
||||
#define C1_1 0x00
|
||||
#define C1_2 0x01
|
||||
#define C1_3 0x02
|
||||
#define C1_4 0x03
|
||||
#define C1_5 0x04
|
||||
#define C1_6 0x05
|
||||
#define C1_7 0x06
|
||||
#define C1_8 0x07
|
||||
|
||||
#define C1_9 0x2C
|
||||
#define C1_10 0x2D
|
||||
#define C1_11 0x2E
|
||||
#define C1_12 0x2F
|
||||
#define C1_13 0x30
|
||||
#define C1_14 0x31
|
||||
#define C1_15 0x32
|
||||
#define C1_16 0x33
|
||||
#define C1_9 0x08
|
||||
#define C1_10 0x09
|
||||
#define C1_11 0x0A
|
||||
#define C1_12 0x0B
|
||||
#define C1_13 0x0C
|
||||
#define C1_14 0x0D
|
||||
#define C1_15 0x0E
|
||||
#define C1_16 0x0F
|
||||
|
||||
#define C2_1 0x34
|
||||
#define C2_2 0x35
|
||||
#define C2_3 0x36
|
||||
#define C2_4 0x37
|
||||
#define C2_5 0x38
|
||||
#define C2_6 0x39
|
||||
#define C2_7 0x3A
|
||||
#define C2_8 0x3B
|
||||
#define C2_1 0x10
|
||||
#define C2_2 0x11
|
||||
#define C2_3 0x12
|
||||
#define C2_4 0x13
|
||||
#define C2_5 0x14
|
||||
#define C2_6 0x15
|
||||
#define C2_7 0x16
|
||||
#define C2_8 0x17
|
||||
|
||||
#define C2_9 0x3C
|
||||
#define C2_10 0x3D
|
||||
#define C2_11 0x3E
|
||||
#define C2_12 0x3F
|
||||
#define C2_13 0x40
|
||||
#define C2_14 0x41
|
||||
#define C2_15 0x42
|
||||
#define C2_16 0x43
|
||||
#define C2_9 0x18
|
||||
#define C2_10 0x19
|
||||
#define C2_11 0x1A
|
||||
#define C2_12 0x1B
|
||||
#define C2_13 0x1C
|
||||
#define C2_14 0x1D
|
||||
#define C2_15 0x1E
|
||||
#define C2_16 0x1F
|
||||
|
||||
#define C3_1 0x44
|
||||
#define C3_2 0x45
|
||||
#define C3_3 0x46
|
||||
#define C3_4 0x47
|
||||
#define C3_5 0x48
|
||||
#define C3_6 0x49
|
||||
#define C3_7 0x4A
|
||||
#define C3_8 0x4B
|
||||
#define C3_1 0x20
|
||||
#define C3_2 0x21
|
||||
#define C3_3 0x22
|
||||
#define C3_4 0x23
|
||||
#define C3_5 0x24
|
||||
#define C3_6 0x25
|
||||
#define C3_7 0x26
|
||||
#define C3_8 0x27
|
||||
|
||||
#define C3_9 0x4C
|
||||
#define C3_10 0x4D
|
||||
#define C3_11 0x4E
|
||||
#define C3_12 0x4F
|
||||
#define C3_13 0x50
|
||||
#define C3_14 0x51
|
||||
#define C3_15 0x52
|
||||
#define C3_16 0x53
|
||||
#define C3_9 0x28
|
||||
#define C3_10 0x29
|
||||
#define C3_11 0x2A
|
||||
#define C3_12 0x2B
|
||||
#define C3_13 0x2C
|
||||
#define C3_14 0x2D
|
||||
#define C3_15 0x2E
|
||||
#define C3_16 0x2F
|
||||
|
||||
#define C4_1 0x54
|
||||
#define C4_2 0x55
|
||||
#define C4_3 0x56
|
||||
#define C4_4 0x57
|
||||
#define C4_5 0x58
|
||||
#define C4_6 0x59
|
||||
#define C4_7 0x5A
|
||||
#define C4_8 0x5B
|
||||
#define C4_1 0x30
|
||||
#define C4_2 0x31
|
||||
#define C4_3 0x32
|
||||
#define C4_4 0x33
|
||||
#define C4_5 0x34
|
||||
#define C4_6 0x35
|
||||
#define C4_7 0x36
|
||||
#define C4_8 0x37
|
||||
|
||||
#define C4_9 0x5C
|
||||
#define C4_10 0x5D
|
||||
#define C4_11 0x5E
|
||||
#define C4_12 0x5F
|
||||
#define C4_13 0x60
|
||||
#define C4_14 0x61
|
||||
#define C4_15 0x62
|
||||
#define C4_16 0x63
|
||||
#define C4_9 0x38
|
||||
#define C4_10 0x39
|
||||
#define C4_11 0x3A
|
||||
#define C4_12 0x3B
|
||||
#define C4_13 0x3C
|
||||
#define C4_14 0x3D
|
||||
#define C4_15 0x3E
|
||||
#define C4_16 0x3F
|
||||
|
||||
#define C5_1 0x64
|
||||
#define C5_2 0x65
|
||||
#define C5_3 0x66
|
||||
#define C5_4 0x67
|
||||
#define C5_5 0x68
|
||||
#define C5_6 0x69
|
||||
#define C5_7 0x6A
|
||||
#define C5_8 0x6B
|
||||
#define C5_1 0x40
|
||||
#define C5_2 0x41
|
||||
#define C5_3 0x42
|
||||
#define C5_4 0x43
|
||||
#define C5_5 0x44
|
||||
#define C5_6 0x45
|
||||
#define C5_7 0x46
|
||||
#define C5_8 0x47
|
||||
|
||||
#define C5_9 0x6C
|
||||
#define C5_10 0x6D
|
||||
#define C5_11 0x6E
|
||||
#define C5_12 0x6F
|
||||
#define C5_13 0x70
|
||||
#define C5_14 0x71
|
||||
#define C5_15 0x72
|
||||
#define C5_16 0x73
|
||||
#define C5_9 0x48
|
||||
#define C5_10 0x49
|
||||
#define C5_11 0x4A
|
||||
#define C5_12 0x4B
|
||||
#define C5_13 0x4C
|
||||
#define C5_14 0x4D
|
||||
#define C5_15 0x4E
|
||||
#define C5_16 0x4F
|
||||
|
||||
#define C6_1 0x74
|
||||
#define C6_2 0x75
|
||||
#define C6_3 0x76
|
||||
#define C6_4 0x77
|
||||
#define C6_5 0x78
|
||||
#define C6_6 0x79
|
||||
#define C6_7 0x7A
|
||||
#define C6_8 0x7B
|
||||
#define C6_1 0x50
|
||||
#define C6_2 0x51
|
||||
#define C6_3 0x52
|
||||
#define C6_4 0x53
|
||||
#define C6_5 0x54
|
||||
#define C6_6 0x55
|
||||
#define C6_7 0x56
|
||||
#define C6_8 0x57
|
||||
|
||||
#define C6_9 0x7C
|
||||
#define C6_10 0x7D
|
||||
#define C6_11 0x7E
|
||||
#define C6_12 0x7F
|
||||
#define C6_13 0x80
|
||||
#define C6_14 0x81
|
||||
#define C6_15 0x82
|
||||
#define C6_16 0x83
|
||||
#define C6_9 0x58
|
||||
#define C6_10 0x59
|
||||
#define C6_11 0x5A
|
||||
#define C6_12 0x5B
|
||||
#define C6_13 0x5C
|
||||
#define C6_14 0x5D
|
||||
#define C6_15 0x5E
|
||||
#define C6_16 0x5F
|
||||
|
||||
#define C7_1 0x84
|
||||
#define C7_2 0x85
|
||||
#define C7_3 0x86
|
||||
#define C7_4 0x87
|
||||
#define C7_5 0x88
|
||||
#define C7_6 0x89
|
||||
#define C7_7 0x8A
|
||||
#define C7_8 0x8B
|
||||
#define C7_1 0x60
|
||||
#define C7_2 0x61
|
||||
#define C7_3 0x62
|
||||
#define C7_4 0x63
|
||||
#define C7_5 0x64
|
||||
#define C7_6 0x65
|
||||
#define C7_7 0x66
|
||||
#define C7_8 0x67
|
||||
|
||||
#define C7_9 0x8C
|
||||
#define C7_10 0x8D
|
||||
#define C7_11 0x8E
|
||||
#define C7_12 0x8F
|
||||
#define C7_13 0x90
|
||||
#define C7_14 0x91
|
||||
#define C7_15 0x92
|
||||
#define C7_16 0x93
|
||||
#define C7_9 0x68
|
||||
#define C7_10 0x69
|
||||
#define C7_11 0x6A
|
||||
#define C7_12 0x6B
|
||||
#define C7_13 0x6C
|
||||
#define C7_14 0x6D
|
||||
#define C7_15 0x6E
|
||||
#define C7_16 0x6F
|
||||
|
||||
#define C8_1 0x94
|
||||
#define C8_2 0x95
|
||||
#define C8_3 0x96
|
||||
#define C8_4 0x97
|
||||
#define C8_5 0x98
|
||||
#define C8_6 0x99
|
||||
#define C8_7 0x9A
|
||||
#define C8_8 0x9B
|
||||
#define C8_1 0x70
|
||||
#define C8_2 0x71
|
||||
#define C8_3 0x72
|
||||
#define C8_4 0x73
|
||||
#define C8_5 0x74
|
||||
#define C8_6 0x75
|
||||
#define C8_7 0x76
|
||||
#define C8_8 0x77
|
||||
|
||||
#define C8_9 0x9C
|
||||
#define C8_10 0x9D
|
||||
#define C8_11 0x9E
|
||||
#define C8_12 0x9F
|
||||
#define C8_13 0xA0
|
||||
#define C8_14 0xA1
|
||||
#define C8_15 0xA2
|
||||
#define C8_16 0xA3
|
||||
#define C8_9 0x78
|
||||
#define C8_10 0x79
|
||||
#define C8_11 0x7A
|
||||
#define C8_12 0x7B
|
||||
#define C8_13 0x7C
|
||||
#define C8_14 0x7D
|
||||
#define C8_15 0x7E
|
||||
#define C8_16 0x7F
|
||||
|
||||
#define C9_1 0xA4
|
||||
#define C9_2 0xA5
|
||||
#define C9_3 0xA6
|
||||
#define C9_4 0xA7
|
||||
#define C9_5 0xA8
|
||||
#define C9_6 0xA9
|
||||
#define C9_7 0xAA
|
||||
#define C9_8 0xAB
|
||||
#define C9_1 0x80
|
||||
#define C9_2 0x81
|
||||
#define C9_3 0x82
|
||||
#define C9_4 0x83
|
||||
#define C9_5 0x84
|
||||
#define C9_6 0x85
|
||||
#define C9_7 0x86
|
||||
#define C9_8 0x87
|
||||
|
||||
#define C9_9 0xAC
|
||||
#define C9_10 0xAD
|
||||
#define C9_11 0xAE
|
||||
#define C9_12 0xAF
|
||||
#define C9_13 0xB0
|
||||
#define C9_14 0xB1
|
||||
#define C9_15 0xB2
|
||||
#define C9_16 0xB3
|
||||
#define C9_9 0x88
|
||||
#define C9_10 0x89
|
||||
#define C9_11 0x8A
|
||||
#define C9_12 0x8B
|
||||
#define C9_13 0x8C
|
||||
#define C9_14 0x8D
|
||||
#define C9_15 0x8E
|
||||
#define C9_16 0x8F
|
||||
|
@ -64,10 +64,10 @@ void is31fl3731_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) {
|
||||
for (uint8_t i = 0; i < IS31FL3731_PWM_REGISTER_COUNT; i += 16) {
|
||||
#if IS31FL3731_I2C_PERSISTENCE > 0
|
||||
for (uint8_t j = 0; j < IS31FL3731_I2C_PERSISTENCE; j++) {
|
||||
if (i2c_writeReg(addr << 1, 0x24 + i, pwm_buffer + i, 16, IS31FL3731_I2C_TIMEOUT) == I2C_STATUS_SUCCESS) break;
|
||||
if (i2c_writeReg(addr << 1, IS31FL3731_FRAME_REG_PWM + i, pwm_buffer + i, 16, IS31FL3731_I2C_TIMEOUT) == I2C_STATUS_SUCCESS) break;
|
||||
}
|
||||
#else
|
||||
i2c_writeReg(addr << 1, 0x24 + i, pwm_buffer + i, 16, IS31FL3731_I2C_TIMEOUT);
|
||||
i2c_writeReg(addr << 1, IS31FL3731_FRAME_REG_PWM + i, pwm_buffer + i, 16, IS31FL3731_I2C_TIMEOUT);
|
||||
#endif
|
||||
}
|
||||
}
|
||||
@ -129,18 +129,18 @@ void is31fl3731_init(uint8_t addr) {
|
||||
is31fl3731_select_page(addr, IS31FL3731_COMMAND_FRAME_1);
|
||||
|
||||
// turn off all LEDs in the LED control register
|
||||
for (int i = 0; i < IS31FL3731_LED_CONTROL_REGISTER_COUNT; i++) {
|
||||
is31fl3731_write_register(addr, i, 0x00);
|
||||
for (uint8_t i = 0; i < IS31FL3731_LED_CONTROL_REGISTER_COUNT; i++) {
|
||||
is31fl3731_write_register(addr, IS31FL3731_FRAME_REG_LED_CONTROL + i, 0x00);
|
||||
}
|
||||
|
||||
// turn off all LEDs in the blink control register (not really needed)
|
||||
for (int i = 0x12; i <= 0x23; i++) {
|
||||
is31fl3731_write_register(addr, i, 0x00);
|
||||
for (uint8_t i = 0; i < IS31FL3731_LED_CONTROL_REGISTER_COUNT; i++) {
|
||||
is31fl3731_write_register(addr, IS31FL3731_FRAME_REG_BLINK_CONTROL + i, 0x00);
|
||||
}
|
||||
|
||||
// set PWM on all LEDs to 0
|
||||
for (int i = 0x24; i <= 0xB3; i++) {
|
||||
is31fl3731_write_register(addr, i, 0x00);
|
||||
for (uint8_t i = 0; i < IS31FL3731_PWM_REGISTER_COUNT; i++) {
|
||||
is31fl3731_write_register(addr, IS31FL3731_FRAME_REG_PWM + i, 0x00);
|
||||
}
|
||||
|
||||
is31fl3731_select_page(addr, IS31FL3731_COMMAND_FUNCTION);
|
||||
@ -160,14 +160,13 @@ void is31fl3731_set_color(int index, uint8_t red, uint8_t green, uint8_t blue) {
|
||||
if (index >= 0 && index < IS31FL3731_LED_COUNT) {
|
||||
memcpy_P(&led, (&g_is31fl3731_leds[index]), sizeof(led));
|
||||
|
||||
// Subtract 0x24 to get the second index of g_pwm_buffer
|
||||
if (g_pwm_buffer[led.driver][led.r - 0x24] == red && g_pwm_buffer[led.driver][led.g - 0x24] == green && g_pwm_buffer[led.driver][led.b - 0x24] == blue) {
|
||||
if (g_pwm_buffer[led.driver][led.r] == red && g_pwm_buffer[led.driver][led.g] == green && g_pwm_buffer[led.driver][led.b] == blue) {
|
||||
return;
|
||||
}
|
||||
|
||||
g_pwm_buffer[led.driver][led.r - 0x24] = red;
|
||||
g_pwm_buffer[led.driver][led.g - 0x24] = green;
|
||||
g_pwm_buffer[led.driver][led.b - 0x24] = blue;
|
||||
g_pwm_buffer[led.driver][led.r] = red;
|
||||
g_pwm_buffer[led.driver][led.g] = green;
|
||||
g_pwm_buffer[led.driver][led.b] = blue;
|
||||
g_pwm_buffer_update_required[led.driver] = true;
|
||||
}
|
||||
}
|
||||
@ -182,12 +181,12 @@ void is31fl3731_set_led_control_register(uint8_t index, bool red, bool green, bo
|
||||
is31fl3731_led_t led;
|
||||
memcpy_P(&led, (&g_is31fl3731_leds[index]), sizeof(led));
|
||||
|
||||
uint8_t control_register_r = (led.r - 0x24) / 8;
|
||||
uint8_t control_register_g = (led.g - 0x24) / 8;
|
||||
uint8_t control_register_b = (led.b - 0x24) / 8;
|
||||
uint8_t bit_r = (led.r - 0x24) % 8;
|
||||
uint8_t bit_g = (led.g - 0x24) % 8;
|
||||
uint8_t bit_b = (led.b - 0x24) % 8;
|
||||
uint8_t control_register_r = led.r / 8;
|
||||
uint8_t control_register_g = led.g / 8;
|
||||
uint8_t control_register_b = led.b / 8;
|
||||
uint8_t bit_r = led.r % 8;
|
||||
uint8_t bit_g = led.g % 8;
|
||||
uint8_t bit_b = led.b % 8;
|
||||
|
||||
if (red) {
|
||||
g_led_control_registers[led.driver][control_register_r] |= (1 << bit_r);
|
||||
@ -218,7 +217,7 @@ void is31fl3731_update_pwm_buffers(uint8_t addr, uint8_t index) {
|
||||
|
||||
void is31fl3731_update_led_control_registers(uint8_t addr, uint8_t index) {
|
||||
if (g_led_control_registers_update_required[index]) {
|
||||
for (int i = 0; i < IS31FL3731_LED_CONTROL_REGISTER_COUNT; i++) {
|
||||
for (uint8_t i = 0; i < IS31FL3731_LED_CONTROL_REGISTER_COUNT; i++) {
|
||||
is31fl3731_write_register(addr, i, g_led_control_registers[index][i]);
|
||||
}
|
||||
|
||||
|
@ -60,6 +60,10 @@
|
||||
#define IS31FL3731_COMMAND_FRAME_8 0x07
|
||||
#define IS31FL3731_COMMAND_FUNCTION 0x0B
|
||||
|
||||
#define IS31FL3731_FRAME_REG_LED_CONTROL 0x00
|
||||
#define IS31FL3731_FRAME_REG_BLINK_CONTROL 0x12
|
||||
#define IS31FL3731_FRAME_REG_PWM 0x24
|
||||
|
||||
#define IS31FL3731_FUNCTION_REG_CONFIG 0x00
|
||||
#define IS31FL3731_CONFIG_MODE_PICTURE 0x00
|
||||
#define IS31FL3731_CONFIG_MODE_AUTO_PLAY 0x08
|
||||
@ -121,164 +125,164 @@ void is31fl3731_update_led_control_registers(uint8_t addr, uint8_t index);
|
||||
|
||||
void is31fl3731_flush(void);
|
||||
|
||||
#define C1_1 0x24
|
||||
#define C1_2 0x25
|
||||
#define C1_3 0x26
|
||||
#define C1_4 0x27
|
||||
#define C1_5 0x28
|
||||
#define C1_6 0x29
|
||||
#define C1_7 0x2A
|
||||
#define C1_8 0x2B
|
||||
#define C1_1 0x00
|
||||
#define C1_2 0x01
|
||||
#define C1_3 0x02
|
||||
#define C1_4 0x03
|
||||
#define C1_5 0x04
|
||||
#define C1_6 0x05
|
||||
#define C1_7 0x06
|
||||
#define C1_8 0x07
|
||||
|
||||
#define C1_9 0x2C
|
||||
#define C1_10 0x2D
|
||||
#define C1_11 0x2E
|
||||
#define C1_12 0x2F
|
||||
#define C1_13 0x30
|
||||
#define C1_14 0x31
|
||||
#define C1_15 0x32
|
||||
#define C1_16 0x33
|
||||
#define C1_9 0x08
|
||||
#define C1_10 0x09
|
||||
#define C1_11 0x0A
|
||||
#define C1_12 0x0B
|
||||
#define C1_13 0x0C
|
||||
#define C1_14 0x0D
|
||||
#define C1_15 0x0E
|
||||
#define C1_16 0x0F
|
||||
|
||||
#define C2_1 0x34
|
||||
#define C2_2 0x35
|
||||
#define C2_3 0x36
|
||||
#define C2_4 0x37
|
||||
#define C2_5 0x38
|
||||
#define C2_6 0x39
|
||||
#define C2_7 0x3A
|
||||
#define C2_8 0x3B
|
||||
#define C2_1 0x10
|
||||
#define C2_2 0x11
|
||||
#define C2_3 0x12
|
||||
#define C2_4 0x13
|
||||
#define C2_5 0x14
|
||||
#define C2_6 0x15
|
||||
#define C2_7 0x16
|
||||
#define C2_8 0x17
|
||||
|
||||
#define C2_9 0x3C
|
||||
#define C2_10 0x3D
|
||||
#define C2_11 0x3E
|
||||
#define C2_12 0x3F
|
||||
#define C2_13 0x40
|
||||
#define C2_14 0x41
|
||||
#define C2_15 0x42
|
||||
#define C2_16 0x43
|
||||
#define C2_9 0x18
|
||||
#define C2_10 0x19
|
||||
#define C2_11 0x1A
|
||||
#define C2_12 0x1B
|
||||
#define C2_13 0x1C
|
||||
#define C2_14 0x1D
|
||||
#define C2_15 0x1E
|
||||
#define C2_16 0x1F
|
||||
|
||||
#define C3_1 0x44
|
||||
#define C3_2 0x45
|
||||
#define C3_3 0x46
|
||||
#define C3_4 0x47
|
||||
#define C3_5 0x48
|
||||
#define C3_6 0x49
|
||||
#define C3_7 0x4A
|
||||
#define C3_8 0x4B
|
||||
#define C3_1 0x20
|
||||
#define C3_2 0x21
|
||||
#define C3_3 0x22
|
||||
#define C3_4 0x23
|
||||
#define C3_5 0x24
|
||||
#define C3_6 0x25
|
||||
#define C3_7 0x26
|
||||
#define C3_8 0x27
|
||||
|
||||
#define C3_9 0x4C
|
||||
#define C3_10 0x4D
|
||||
#define C3_11 0x4E
|
||||
#define C3_12 0x4F
|
||||
#define C3_13 0x50
|
||||
#define C3_14 0x51
|
||||
#define C3_15 0x52
|
||||
#define C3_16 0x53
|
||||
#define C3_9 0x28
|
||||
#define C3_10 0x29
|
||||
#define C3_11 0x2A
|
||||
#define C3_12 0x2B
|
||||
#define C3_13 0x2C
|
||||
#define C3_14 0x2D
|
||||
#define C3_15 0x2E
|
||||
#define C3_16 0x2F
|
||||
|
||||
#define C4_1 0x54
|
||||
#define C4_2 0x55
|
||||
#define C4_3 0x56
|
||||
#define C4_4 0x57
|
||||
#define C4_5 0x58
|
||||
#define C4_6 0x59
|
||||
#define C4_7 0x5A
|
||||
#define C4_8 0x5B
|
||||
#define C4_1 0x30
|
||||
#define C4_2 0x31
|
||||
#define C4_3 0x32
|
||||
#define C4_4 0x33
|
||||
#define C4_5 0x34
|
||||
#define C4_6 0x35
|
||||
#define C4_7 0x36
|
||||
#define C4_8 0x37
|
||||
|
||||
#define C4_9 0x5C
|
||||
#define C4_10 0x5D
|
||||
#define C4_11 0x5E
|
||||
#define C4_12 0x5F
|
||||
#define C4_13 0x60
|
||||
#define C4_14 0x61
|
||||
#define C4_15 0x62
|
||||
#define C4_16 0x63
|
||||
#define C4_9 0x38
|
||||
#define C4_10 0x39
|
||||
#define C4_11 0x3A
|
||||
#define C4_12 0x3B
|
||||
#define C4_13 0x3C
|
||||
#define C4_14 0x3D
|
||||
#define C4_15 0x3E
|
||||
#define C4_16 0x3F
|
||||
|
||||
#define C5_1 0x64
|
||||
#define C5_2 0x65
|
||||
#define C5_3 0x66
|
||||
#define C5_4 0x67
|
||||
#define C5_5 0x68
|
||||
#define C5_6 0x69
|
||||
#define C5_7 0x6A
|
||||
#define C5_8 0x6B
|
||||
#define C5_1 0x40
|
||||
#define C5_2 0x41
|
||||
#define C5_3 0x42
|
||||
#define C5_4 0x43
|
||||
#define C5_5 0x44
|
||||
#define C5_6 0x45
|
||||
#define C5_7 0x46
|
||||
#define C5_8 0x47
|
||||
|
||||
#define C5_9 0x6C
|
||||
#define C5_10 0x6D
|
||||
#define C5_11 0x6E
|
||||
#define C5_12 0x6F
|
||||
#define C5_13 0x70
|
||||
#define C5_14 0x71
|
||||
#define C5_15 0x72
|
||||
#define C5_16 0x73
|
||||
#define C5_9 0x48
|
||||
#define C5_10 0x49
|
||||
#define C5_11 0x4A
|
||||
#define C5_12 0x4B
|
||||
#define C5_13 0x4C
|
||||
#define C5_14 0x4D
|
||||
#define C5_15 0x4E
|
||||
#define C5_16 0x4F
|
||||
|
||||
#define C6_1 0x74
|
||||
#define C6_2 0x75
|
||||
#define C6_3 0x76
|
||||
#define C6_4 0x77
|
||||
#define C6_5 0x78
|
||||
#define C6_6 0x79
|
||||
#define C6_7 0x7A
|
||||
#define C6_8 0x7B
|
||||
#define C6_1 0x50
|
||||
#define C6_2 0x51
|
||||
#define C6_3 0x52
|
||||
#define C6_4 0x53
|
||||
#define C6_5 0x54
|
||||
#define C6_6 0x55
|
||||
#define C6_7 0x56
|
||||
#define C6_8 0x57
|
||||
|
||||
#define C6_9 0x7C
|
||||
#define C6_10 0x7D
|
||||
#define C6_11 0x7E
|
||||
#define C6_12 0x7F
|
||||
#define C6_13 0x80
|
||||
#define C6_14 0x81
|
||||
#define C6_15 0x82
|
||||
#define C6_16 0x83
|
||||
#define C6_9 0x58
|
||||
#define C6_10 0x59
|
||||
#define C6_11 0x5A
|
||||
#define C6_12 0x5B
|
||||
#define C6_13 0x5C
|
||||
#define C6_14 0x5D
|
||||
#define C6_15 0x5E
|
||||
#define C6_16 0x5F
|
||||
|
||||
#define C7_1 0x84
|
||||
#define C7_2 0x85
|
||||
#define C7_3 0x86
|
||||
#define C7_4 0x87
|
||||
#define C7_5 0x88
|
||||
#define C7_6 0x89
|
||||
#define C7_7 0x8A
|
||||
#define C7_8 0x8B
|
||||
#define C7_1 0x60
|
||||
#define C7_2 0x61
|
||||
#define C7_3 0x62
|
||||
#define C7_4 0x63
|
||||
#define C7_5 0x64
|
||||
#define C7_6 0x65
|
||||
#define C7_7 0x66
|
||||
#define C7_8 0x67
|
||||
|
||||
#define C7_9 0x8C
|
||||
#define C7_10 0x8D
|
||||
#define C7_11 0x8E
|
||||
#define C7_12 0x8F
|
||||
#define C7_13 0x90
|
||||
#define C7_14 0x91
|
||||
#define C7_15 0x92
|
||||
#define C7_16 0x93
|
||||
#define C7_9 0x68
|
||||
#define C7_10 0x69
|
||||
#define C7_11 0x6A
|
||||
#define C7_12 0x6B
|
||||
#define C7_13 0x6C
|
||||
#define C7_14 0x6D
|
||||
#define C7_15 0x6E
|
||||
#define C7_16 0x6F
|
||||
|
||||
#define C8_1 0x94
|
||||
#define C8_2 0x95
|
||||
#define C8_3 0x96
|
||||
#define C8_4 0x97
|
||||
#define C8_5 0x98
|
||||
#define C8_6 0x99
|
||||
#define C8_7 0x9A
|
||||
#define C8_8 0x9B
|
||||
#define C8_1 0x70
|
||||
#define C8_2 0x71
|
||||
#define C8_3 0x72
|
||||
#define C8_4 0x73
|
||||
#define C8_5 0x74
|
||||
#define C8_6 0x75
|
||||
#define C8_7 0x76
|
||||
#define C8_8 0x77
|
||||
|
||||
#define C8_9 0x9C
|
||||
#define C8_10 0x9D
|
||||
#define C8_11 0x9E
|
||||
#define C8_12 0x9F
|
||||
#define C8_13 0xA0
|
||||
#define C8_14 0xA1
|
||||
#define C8_15 0xA2
|
||||
#define C8_16 0xA3
|
||||
#define C8_9 0x78
|
||||
#define C8_10 0x79
|
||||
#define C8_11 0x7A
|
||||
#define C8_12 0x7B
|
||||
#define C8_13 0x7C
|
||||
#define C8_14 0x7D
|
||||
#define C8_15 0x7E
|
||||
#define C8_16 0x7F
|
||||
|
||||
#define C9_1 0xA4
|
||||
#define C9_2 0xA5
|
||||
#define C9_3 0xA6
|
||||
#define C9_4 0xA7
|
||||
#define C9_5 0xA8
|
||||
#define C9_6 0xA9
|
||||
#define C9_7 0xAA
|
||||
#define C9_8 0xAB
|
||||
#define C9_1 0x80
|
||||
#define C9_2 0x81
|
||||
#define C9_3 0x82
|
||||
#define C9_4 0x83
|
||||
#define C9_5 0x84
|
||||
#define C9_6 0x85
|
||||
#define C9_7 0x86
|
||||
#define C9_8 0x87
|
||||
|
||||
#define C9_9 0xAC
|
||||
#define C9_10 0xAD
|
||||
#define C9_11 0xAE
|
||||
#define C9_12 0xAF
|
||||
#define C9_13 0xB0
|
||||
#define C9_14 0xB1
|
||||
#define C9_15 0xB2
|
||||
#define C9_16 0xB3
|
||||
#define C9_9 0x88
|
||||
#define C9_10 0x89
|
||||
#define C9_11 0x8A
|
||||
#define C9_12 0x8B
|
||||
#define C9_13 0x8C
|
||||
#define C9_14 0x8D
|
||||
#define C9_15 0x8E
|
||||
#define C9_16 0x8F
|
||||
|
@ -145,7 +145,7 @@ void is31fl3733_init(uint8_t addr, uint8_t sync) {
|
||||
is31fl3733_select_page(addr, IS31FL3733_COMMAND_LED_CONTROL);
|
||||
|
||||
// Turn off all LEDs.
|
||||
for (int i = 0; i < IS31FL3733_LED_CONTROL_REGISTER_COUNT; i++) {
|
||||
for (uint8_t i = 0; i < IS31FL3733_LED_CONTROL_REGISTER_COUNT; i++) {
|
||||
is31fl3733_write_register(addr, i, 0x00);
|
||||
}
|
||||
|
||||
@ -153,7 +153,7 @@ void is31fl3733_init(uint8_t addr, uint8_t sync) {
|
||||
|
||||
// Set PWM on all LEDs to 0
|
||||
// No need to setup Breath registers to PWM as that is the default.
|
||||
for (int i = 0; i < IS31FL3733_PWM_REGISTER_COUNT; i++) {
|
||||
for (uint8_t i = 0; i < IS31FL3733_PWM_REGISTER_COUNT; i++) {
|
||||
is31fl3733_write_register(addr, i, 0x00);
|
||||
}
|
||||
|
||||
@ -223,7 +223,7 @@ void is31fl3733_update_led_control_registers(uint8_t addr, uint8_t index) {
|
||||
if (g_led_control_registers_update_required[index]) {
|
||||
is31fl3733_select_page(addr, IS31FL3733_COMMAND_LED_CONTROL);
|
||||
|
||||
for (int i = 0; i < IS31FL3733_LED_CONTROL_REGISTER_COUNT; i++) {
|
||||
for (uint8_t i = 0; i < IS31FL3733_LED_CONTROL_REGISTER_COUNT; i++) {
|
||||
is31fl3733_write_register(addr, i, g_led_control_registers[index][i]);
|
||||
}
|
||||
|
||||
|
@ -144,7 +144,7 @@ void is31fl3733_init(uint8_t addr, uint8_t sync) {
|
||||
is31fl3733_select_page(addr, IS31FL3733_COMMAND_LED_CONTROL);
|
||||
|
||||
// Turn off all LEDs.
|
||||
for (int i = 0; i < IS31FL3733_LED_CONTROL_REGISTER_COUNT; i++) {
|
||||
for (uint8_t i = 0; i < IS31FL3733_LED_CONTROL_REGISTER_COUNT; i++) {
|
||||
is31fl3733_write_register(addr, i, 0x00);
|
||||
}
|
||||
|
||||
@ -152,7 +152,7 @@ void is31fl3733_init(uint8_t addr, uint8_t sync) {
|
||||
|
||||
// Set PWM on all LEDs to 0
|
||||
// No need to setup Breath registers to PWM as that is the default.
|
||||
for (int i = 0; i < IS31FL3733_PWM_REGISTER_COUNT; i++) {
|
||||
for (uint8_t i = 0; i < IS31FL3733_PWM_REGISTER_COUNT; i++) {
|
||||
is31fl3733_write_register(addr, i, 0x00);
|
||||
}
|
||||
|
||||
@ -238,7 +238,7 @@ void is31fl3733_update_led_control_registers(uint8_t addr, uint8_t index) {
|
||||
if (g_led_control_registers_update_required[index]) {
|
||||
is31fl3733_select_page(addr, IS31FL3733_COMMAND_LED_CONTROL);
|
||||
|
||||
for (int i = 0; i < IS31FL3733_LED_CONTROL_REGISTER_COUNT; i++) {
|
||||
for (uint8_t i = 0; i < IS31FL3733_LED_CONTROL_REGISTER_COUNT; i++) {
|
||||
is31fl3733_write_register(addr, i, g_led_control_registers[index][i]);
|
||||
}
|
||||
|
||||
|
@ -128,7 +128,7 @@ void is31fl3736_init(uint8_t addr) {
|
||||
is31fl3736_select_page(addr, IS31FL3736_COMMAND_LED_CONTROL);
|
||||
|
||||
// Turn off all LEDs.
|
||||
for (int i = 0; i < IS31FL3736_LED_CONTROL_REGISTER_COUNT; i++) {
|
||||
for (uint8_t i = 0; i < IS31FL3736_LED_CONTROL_REGISTER_COUNT; i++) {
|
||||
is31fl3736_write_register(addr, i, 0x00);
|
||||
}
|
||||
|
||||
@ -136,7 +136,7 @@ void is31fl3736_init(uint8_t addr) {
|
||||
|
||||
// Set PWM on all LEDs to 0
|
||||
// No need to setup Breath registers to PWM as that is the default.
|
||||
for (int i = 0; i < IS31FL3736_PWM_REGISTER_COUNT; i++) {
|
||||
for (uint8_t i = 0; i < IS31FL3736_PWM_REGISTER_COUNT; i++) {
|
||||
is31fl3736_write_register(addr, i, 0x00);
|
||||
}
|
||||
|
||||
@ -212,7 +212,7 @@ void is31fl3736_update_led_control_registers(uint8_t addr, uint8_t index) {
|
||||
if (g_led_control_registers_update_required[index]) {
|
||||
is31fl3736_select_page(addr, IS31FL3736_COMMAND_LED_CONTROL);
|
||||
|
||||
for (int i = 0; i < IS31FL3736_LED_CONTROL_REGISTER_COUNT; i++) {
|
||||
for (uint8_t i = 0; i < IS31FL3736_LED_CONTROL_REGISTER_COUNT; i++) {
|
||||
is31fl3736_write_register(addr, i, g_led_control_registers[index][i]);
|
||||
}
|
||||
|
||||
|
@ -128,7 +128,7 @@ void is31fl3736_init(uint8_t addr) {
|
||||
is31fl3736_select_page(addr, IS31FL3736_COMMAND_LED_CONTROL);
|
||||
|
||||
// Turn off all LEDs.
|
||||
for (int i = 0; i < IS31FL3736_LED_CONTROL_REGISTER_COUNT; i++) {
|
||||
for (uint8_t i = 0; i < IS31FL3736_LED_CONTROL_REGISTER_COUNT; i++) {
|
||||
is31fl3736_write_register(addr, i, 0x00);
|
||||
}
|
||||
|
||||
@ -136,7 +136,7 @@ void is31fl3736_init(uint8_t addr) {
|
||||
|
||||
// Set PWM on all LEDs to 0
|
||||
// No need to setup Breath registers to PWM as that is the default.
|
||||
for (int i = 0; i < IS31FL3736_PWM_REGISTER_COUNT; i++) {
|
||||
for (uint8_t i = 0; i < IS31FL3736_PWM_REGISTER_COUNT; i++) {
|
||||
is31fl3736_write_register(addr, i, 0x00);
|
||||
}
|
||||
|
||||
@ -229,7 +229,7 @@ void is31fl3736_update_led_control_registers(uint8_t addr, uint8_t index) {
|
||||
if (g_led_control_registers_update_required[index]) {
|
||||
is31fl3736_select_page(addr, IS31FL3736_COMMAND_LED_CONTROL);
|
||||
|
||||
for (int i = 0; i < IS31FL3736_LED_CONTROL_REGISTER_COUNT; i++) {
|
||||
for (uint8_t i = 0; i < IS31FL3736_LED_CONTROL_REGISTER_COUNT; i++) {
|
||||
is31fl3736_write_register(addr, i, g_led_control_registers[index][i]);
|
||||
}
|
||||
|
||||
|
@ -131,7 +131,7 @@ void is31fl3737_init(uint8_t addr) {
|
||||
is31fl3737_select_page(addr, IS31FL3737_COMMAND_LED_CONTROL);
|
||||
|
||||
// Turn off all LEDs.
|
||||
for (int i = 0; i < IS31FL3737_LED_CONTROL_REGISTER_COUNT; i++) {
|
||||
for (uint8_t i = 0; i < IS31FL3737_LED_CONTROL_REGISTER_COUNT; i++) {
|
||||
is31fl3737_write_register(addr, i, 0x00);
|
||||
}
|
||||
|
||||
@ -139,7 +139,7 @@ void is31fl3737_init(uint8_t addr) {
|
||||
|
||||
// Set PWM on all LEDs to 0
|
||||
// No need to setup Breath registers to PWM as that is the default.
|
||||
for (int i = 0; i < IS31FL3737_PWM_REGISTER_COUNT; i++) {
|
||||
for (uint8_t i = 0; i < IS31FL3737_PWM_REGISTER_COUNT; i++) {
|
||||
is31fl3737_write_register(addr, i, 0x00);
|
||||
}
|
||||
|
||||
@ -209,7 +209,7 @@ void is31fl3737_update_led_control_registers(uint8_t addr, uint8_t index) {
|
||||
if (g_led_control_registers_update_required[index]) {
|
||||
is31fl3737_select_page(addr, IS31FL3737_COMMAND_LED_CONTROL);
|
||||
|
||||
for (int i = 0; i < IS31FL3737_LED_CONTROL_REGISTER_COUNT; i++) {
|
||||
for (uint8_t i = 0; i < IS31FL3737_LED_CONTROL_REGISTER_COUNT; i++) {
|
||||
is31fl3737_write_register(addr, i, g_led_control_registers[index][i]);
|
||||
}
|
||||
|
||||
|
@ -131,7 +131,7 @@ void is31fl3737_init(uint8_t addr) {
|
||||
is31fl3737_select_page(addr, IS31FL3737_COMMAND_LED_CONTROL);
|
||||
|
||||
// Turn off all LEDs.
|
||||
for (int i = 0; i < IS31FL3737_LED_CONTROL_REGISTER_COUNT; i++) {
|
||||
for (uint8_t i = 0; i < IS31FL3737_LED_CONTROL_REGISTER_COUNT; i++) {
|
||||
is31fl3737_write_register(addr, i, 0x00);
|
||||
}
|
||||
|
||||
@ -139,7 +139,7 @@ void is31fl3737_init(uint8_t addr) {
|
||||
|
||||
// Set PWM on all LEDs to 0
|
||||
// No need to setup Breath registers to PWM as that is the default.
|
||||
for (int i = 0; i < IS31FL3737_PWM_REGISTER_COUNT; i++) {
|
||||
for (uint8_t i = 0; i < IS31FL3737_PWM_REGISTER_COUNT; i++) {
|
||||
is31fl3737_write_register(addr, i, 0x00);
|
||||
}
|
||||
|
||||
@ -225,7 +225,7 @@ void is31fl3737_update_led_control_registers(uint8_t addr, uint8_t index) {
|
||||
if (g_led_control_registers_update_required[index]) {
|
||||
is31fl3737_select_page(addr, IS31FL3737_COMMAND_LED_CONTROL);
|
||||
|
||||
for (int i = 0; i < IS31FL3737_LED_CONTROL_REGISTER_COUNT; i++) {
|
||||
for (uint8_t i = 0; i < IS31FL3737_LED_CONTROL_REGISTER_COUNT; i++) {
|
||||
is31fl3737_write_register(addr, i, g_led_control_registers[index][i]);
|
||||
}
|
||||
|
||||
|
@ -82,10 +82,10 @@ void is31fl3742a_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) {
|
||||
for (uint8_t i = 0; i < IS31FL3742A_PWM_REGISTER_COUNT; i += 30) {
|
||||
#if IS31FL3742A_I2C_PERSISTENCE > 0
|
||||
for (uint8_t j = 0; j < IS31FL3742A_I2C_PERSISTENCE; j++) {
|
||||
if (i2c_writeReg(addr << 1, i + 1, pwm_buffer + i, 30, IS31FL3742A_I2C_TIMEOUT) == I2C_STATUS_SUCCESS) break;
|
||||
if (i2c_writeReg(addr << 1, i, pwm_buffer + i, 30, IS31FL3742A_I2C_TIMEOUT) == I2C_STATUS_SUCCESS) break;
|
||||
}
|
||||
#else
|
||||
i2c_writeReg(addr << 1, i + 1, pwm_buffer + i, 30, IS31FL3742A_I2C_TIMEOUT);
|
||||
i2c_writeReg(addr << 1, i, pwm_buffer + i, 30, IS31FL3742A_I2C_TIMEOUT);
|
||||
#endif
|
||||
}
|
||||
}
|
||||
@ -129,13 +129,13 @@ void is31fl3742a_init(uint8_t addr) {
|
||||
is31fl3742a_select_page(addr, IS31FL3742A_COMMAND_SCALING);
|
||||
|
||||
// Turn off all LEDs.
|
||||
for (int i = 0; i < IS31FL3742A_SCALING_REGISTER_COUNT; i++) {
|
||||
for (uint8_t i = 0; i < IS31FL3742A_SCALING_REGISTER_COUNT; i++) {
|
||||
is31fl3742a_write_register(addr, i, 0x00);
|
||||
}
|
||||
|
||||
is31fl3742a_select_page(addr, IS31FL3742A_COMMAND_PWM);
|
||||
|
||||
for (int i = 0; i < IS31FL3742A_PWM_REGISTER_COUNT; i++) {
|
||||
for (uint8_t i = 0; i < IS31FL3742A_PWM_REGISTER_COUNT; i++) {
|
||||
is31fl3742a_write_register(addr, i, 0x00);
|
||||
}
|
||||
|
||||
@ -193,7 +193,7 @@ void is31fl3742a_update_scaling_registers(uint8_t addr, uint8_t index) {
|
||||
if (g_scaling_registers_update_required[index]) {
|
||||
is31fl3742a_select_page(addr, IS31FL3742A_COMMAND_SCALING);
|
||||
|
||||
for (int i = 0; i < IS31FL3742A_SCALING_REGISTER_COUNT; i++) {
|
||||
for (uint8_t i = 0; i < IS31FL3742A_SCALING_REGISTER_COUNT; i++) {
|
||||
is31fl3742a_write_register(addr, i, g_scaling_registers[index][i]);
|
||||
}
|
||||
|
||||
|
@ -82,10 +82,10 @@ void is31fl3742a_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) {
|
||||
for (uint8_t i = 0; i < IS31FL3742A_PWM_REGISTER_COUNT; i += 30) {
|
||||
#if IS31FL3742A_I2C_PERSISTENCE > 0
|
||||
for (uint8_t j = 0; j < IS31FL3742A_I2C_PERSISTENCE; j++) {
|
||||
if (i2c_writeReg(addr << 1, i + 1, pwm_buffer + i, 30, IS31FL3742A_I2C_TIMEOUT) == I2C_STATUS_SUCCESS) break;
|
||||
if (i2c_writeReg(addr << 1, i, pwm_buffer + i, 30, IS31FL3742A_I2C_TIMEOUT) == I2C_STATUS_SUCCESS) break;
|
||||
}
|
||||
#else
|
||||
i2c_writeReg(addr << 1, i + 1, pwm_buffer + i, 30, IS31FL3742A_I2C_TIMEOUT);
|
||||
i2c_writeReg(addr << 1, i, pwm_buffer + i, 30, IS31FL3742A_I2C_TIMEOUT);
|
||||
#endif
|
||||
}
|
||||
}
|
||||
@ -129,13 +129,13 @@ void is31fl3742a_init(uint8_t addr) {
|
||||
is31fl3742a_select_page(addr, IS31FL3742A_COMMAND_SCALING);
|
||||
|
||||
// Turn off all LEDs.
|
||||
for (int i = 0; i < IS31FL3742A_SCALING_REGISTER_COUNT; i++) {
|
||||
for (uint8_t i = 0; i < IS31FL3742A_SCALING_REGISTER_COUNT; i++) {
|
||||
is31fl3742a_write_register(addr, i, 0x00);
|
||||
}
|
||||
|
||||
is31fl3742a_select_page(addr, IS31FL3742A_COMMAND_PWM);
|
||||
|
||||
for (int i = 0; i < IS31FL3742A_PWM_REGISTER_COUNT; i++) {
|
||||
for (uint8_t i = 0; i < IS31FL3742A_PWM_REGISTER_COUNT; i++) {
|
||||
is31fl3742a_write_register(addr, i, 0x00);
|
||||
}
|
||||
|
||||
@ -197,7 +197,7 @@ void is31fl3742a_update_scaling_registers(uint8_t addr, uint8_t index) {
|
||||
if (g_scaling_registers_update_required[index]) {
|
||||
is31fl3742a_select_page(addr, IS31FL3742A_COMMAND_SCALING);
|
||||
|
||||
for (int i = 0; i < IS31FL3742A_SCALING_REGISTER_COUNT; i++) {
|
||||
for (uint8_t i = 0; i < IS31FL3742A_SCALING_REGISTER_COUNT; i++) {
|
||||
is31fl3742a_write_register(addr, i, g_scaling_registers[index][i]);
|
||||
}
|
||||
|
||||
|
@ -138,13 +138,13 @@ void is31fl3743a_init(uint8_t addr, uint8_t sync) {
|
||||
is31fl3743a_select_page(addr, IS31FL3743A_COMMAND_SCALING);
|
||||
|
||||
// Turn off all LEDs.
|
||||
for (int i = 0; i < IS31FL3743A_SCALING_REGISTER_COUNT; i++) {
|
||||
for (uint8_t i = 0; i < IS31FL3743A_SCALING_REGISTER_COUNT; i++) {
|
||||
is31fl3743a_write_register(addr, i + 1, 0x00);
|
||||
}
|
||||
|
||||
is31fl3743a_select_page(addr, IS31FL3743A_COMMAND_PWM);
|
||||
|
||||
for (int i = 0; i < IS31FL3743A_PWM_REGISTER_COUNT; i++) {
|
||||
for (uint8_t i = 0; i < IS31FL3743A_PWM_REGISTER_COUNT; i++) {
|
||||
is31fl3743a_write_register(addr, i + 1, 0x00);
|
||||
}
|
||||
|
||||
@ -202,7 +202,7 @@ void is31fl3743a_update_scaling_registers(uint8_t addr, uint8_t index) {
|
||||
if (g_scaling_registers_update_required[index]) {
|
||||
is31fl3743a_select_page(addr, IS31FL3743A_COMMAND_SCALING);
|
||||
|
||||
for (int i = 0; i < IS31FL3743A_SCALING_REGISTER_COUNT; i++) {
|
||||
for (uint8_t i = 0; i < IS31FL3743A_SCALING_REGISTER_COUNT; i++) {
|
||||
is31fl3743a_write_register(addr, i + 1, g_scaling_registers[index][i]);
|
||||
}
|
||||
|
||||
|
@ -138,13 +138,13 @@ void is31fl3743a_init(uint8_t addr, uint8_t sync) {
|
||||
is31fl3743a_select_page(addr, IS31FL3743A_COMMAND_SCALING);
|
||||
|
||||
// Turn off all LEDs.
|
||||
for (int i = 0; i < IS31FL3743A_SCALING_REGISTER_COUNT; i++) {
|
||||
for (uint8_t i = 0; i < IS31FL3743A_SCALING_REGISTER_COUNT; i++) {
|
||||
is31fl3743a_write_register(addr, i + 1, 0x00);
|
||||
}
|
||||
|
||||
is31fl3743a_select_page(addr, IS31FL3743A_COMMAND_PWM);
|
||||
|
||||
for (int i = 0; i < IS31FL3743A_PWM_REGISTER_COUNT; i++) {
|
||||
for (uint8_t i = 0; i < IS31FL3743A_PWM_REGISTER_COUNT; i++) {
|
||||
is31fl3743a_write_register(addr, i + 1, 0x00);
|
||||
}
|
||||
|
||||
@ -206,7 +206,7 @@ void is31fl3743a_update_scaling_registers(uint8_t addr, uint8_t index) {
|
||||
if (g_scaling_registers_update_required[index]) {
|
||||
is31fl3743a_select_page(addr, IS31FL3743A_COMMAND_SCALING);
|
||||
|
||||
for (int i = 0; i < IS31FL3743A_SCALING_REGISTER_COUNT; i++) {
|
||||
for (uint8_t i = 0; i < IS31FL3743A_SCALING_REGISTER_COUNT; i++) {
|
||||
is31fl3743a_write_register(addr, i + 1, g_scaling_registers[index][i]);
|
||||
}
|
||||
|
||||
|
@ -138,13 +138,13 @@ void is31fl3745_init(uint8_t addr, uint8_t sync) {
|
||||
is31fl3745_select_page(addr, IS31FL3745_COMMAND_SCALING);
|
||||
|
||||
// Turn off all LEDs.
|
||||
for (int i = 0; i < IS31FL3745_SCALING_REGISTER_COUNT; i++) {
|
||||
for (uint8_t i = 0; i < IS31FL3745_SCALING_REGISTER_COUNT; i++) {
|
||||
is31fl3745_write_register(addr, i + 1, 0x00);
|
||||
}
|
||||
|
||||
is31fl3745_select_page(addr, IS31FL3745_COMMAND_PWM);
|
||||
|
||||
for (int i = 0; i < IS31FL3745_PWM_REGISTER_COUNT; i++) {
|
||||
for (uint8_t i = 0; i < IS31FL3745_PWM_REGISTER_COUNT; i++) {
|
||||
is31fl3745_write_register(addr, i + 1, 0x00);
|
||||
}
|
||||
|
||||
@ -202,7 +202,7 @@ void is31fl3745_update_scaling_registers(uint8_t addr, uint8_t index) {
|
||||
if (g_scaling_registers_update_required[index]) {
|
||||
is31fl3745_select_page(addr, IS31FL3745_COMMAND_SCALING);
|
||||
|
||||
for (int i = 0; i < IS31FL3745_SCALING_REGISTER_COUNT; i++) {
|
||||
for (uint8_t i = 0; i < IS31FL3745_SCALING_REGISTER_COUNT; i++) {
|
||||
is31fl3745_write_register(addr, i + 1, g_scaling_registers[index][i]);
|
||||
}
|
||||
|
||||
|
@ -138,13 +138,13 @@ void is31fl3745_init(uint8_t addr, uint8_t sync) {
|
||||
is31fl3745_select_page(addr, IS31FL3745_COMMAND_SCALING);
|
||||
|
||||
// Turn off all LEDs.
|
||||
for (int i = 0; i < IS31FL3745_SCALING_REGISTER_COUNT; i++) {
|
||||
for (uint8_t i = 0; i < IS31FL3745_SCALING_REGISTER_COUNT; i++) {
|
||||
is31fl3745_write_register(addr, i + 1, 0x00);
|
||||
}
|
||||
|
||||
is31fl3745_select_page(addr, IS31FL3745_COMMAND_PWM);
|
||||
|
||||
for (int i = 0; i < IS31FL3745_PWM_REGISTER_COUNT; i++) {
|
||||
for (uint8_t i = 0; i < IS31FL3745_PWM_REGISTER_COUNT; i++) {
|
||||
is31fl3745_write_register(addr, i + 1, 0x00);
|
||||
}
|
||||
|
||||
@ -206,7 +206,7 @@ void is31fl3745_update_scaling_registers(uint8_t addr, uint8_t index) {
|
||||
if (g_scaling_registers_update_required[index]) {
|
||||
is31fl3745_select_page(addr, IS31FL3745_COMMAND_SCALING);
|
||||
|
||||
for (int i = 0; i < IS31FL3745_SCALING_REGISTER_COUNT; i++) {
|
||||
for (uint8_t i = 0; i < IS31FL3745_SCALING_REGISTER_COUNT; i++) {
|
||||
is31fl3745_write_register(addr, i + 1, g_scaling_registers[index][i]);
|
||||
}
|
||||
|
||||
|
@ -129,13 +129,13 @@ void is31fl3746a_init(uint8_t addr) {
|
||||
is31fl3746a_select_page(addr, IS31FL3746A_COMMAND_SCALING);
|
||||
|
||||
// Turn off all LEDs.
|
||||
for (int i = 0; i < IS31FL3746A_SCALING_REGISTER_COUNT; i++) {
|
||||
for (uint8_t i = 0; i < IS31FL3746A_SCALING_REGISTER_COUNT; i++) {
|
||||
is31fl3746a_write_register(addr, i + 1, 0x00);
|
||||
}
|
||||
|
||||
is31fl3746a_select_page(addr, IS31FL3746A_COMMAND_PWM);
|
||||
|
||||
for (int i = 0; i < IS31FL3746A_PWM_REGISTER_COUNT; i++) {
|
||||
for (uint8_t i = 0; i < IS31FL3746A_PWM_REGISTER_COUNT; i++) {
|
||||
is31fl3746a_write_register(addr, i + 1, 0x00);
|
||||
}
|
||||
|
||||
@ -194,7 +194,7 @@ void is31fl3746a_update_scaling_registers(uint8_t addr, uint8_t index) {
|
||||
if (g_scaling_registers_update_required[index]) {
|
||||
is31fl3746a_select_page(addr, IS31FL3746A_COMMAND_SCALING);
|
||||
|
||||
for (int i = 0; i < IS31FL3746A_SCALING_REGISTER_COUNT; i++) {
|
||||
for (uint8_t i = 0; i < IS31FL3746A_SCALING_REGISTER_COUNT; i++) {
|
||||
is31fl3746a_write_register(addr, i + 1, g_scaling_registers[index][i]);
|
||||
}
|
||||
|
||||
|
@ -129,13 +129,13 @@ void is31fl3746a_init(uint8_t addr) {
|
||||
is31fl3746a_select_page(addr, IS31FL3746A_COMMAND_SCALING);
|
||||
|
||||
// Turn off all LEDs.
|
||||
for (int i = 0; i < IS31FL3746A_SCALING_REGISTER_COUNT; i++) {
|
||||
for (uint8_t i = 0; i < IS31FL3746A_SCALING_REGISTER_COUNT; i++) {
|
||||
is31fl3746a_write_register(addr, i + 1, 0x00);
|
||||
}
|
||||
|
||||
is31fl3746a_select_page(addr, IS31FL3746A_COMMAND_PWM);
|
||||
|
||||
for (int i = 0; i < IS31FL3746A_PWM_REGISTER_COUNT; i++) {
|
||||
for (uint8_t i = 0; i < IS31FL3746A_PWM_REGISTER_COUNT; i++) {
|
||||
is31fl3746a_write_register(addr, i + 1, 0x00);
|
||||
}
|
||||
|
||||
@ -198,7 +198,7 @@ void is31fl3746a_update_scaling_registers(uint8_t addr, uint8_t index) {
|
||||
if (g_scaling_registers_update_required[index]) {
|
||||
is31fl3746a_select_page(addr, IS31FL3746A_COMMAND_SCALING);
|
||||
|
||||
for (int i = 0; i < IS31FL3746A_SCALING_REGISTER_COUNT; i++) {
|
||||
for (uint8_t i = 0; i < IS31FL3746A_SCALING_REGISTER_COUNT; i++) {
|
||||
is31fl3746a_write_register(addr, i + 1, g_scaling_registers[index][i]);
|
||||
}
|
||||
|
||||
|
@ -206,7 +206,7 @@ void snled27351_update_led_control_registers(uint8_t addr, uint8_t index) {
|
||||
if (g_led_control_registers_update_required[index]) {
|
||||
snled27351_select_page(addr, SNLED27351_COMMAND_LED_CONTROL);
|
||||
|
||||
for (int i = 0; i < SNLED27351_LED_CONTROL_REGISTER_COUNT; i++) {
|
||||
for (uint8_t i = 0; i < SNLED27351_LED_CONTROL_REGISTER_COUNT; i++) {
|
||||
snled27351_write_register(addr, i, g_led_control_registers[index][i]);
|
||||
}
|
||||
|
||||
|
@ -222,7 +222,7 @@ void snled27351_update_led_control_registers(uint8_t addr, uint8_t index) {
|
||||
if (g_led_control_registers_update_required[index]) {
|
||||
snled27351_select_page(addr, SNLED27351_COMMAND_LED_CONTROL);
|
||||
|
||||
for (int i = 0; i < SNLED27351_LED_CONTROL_REGISTER_COUNT; i++) {
|
||||
for (uint8_t i = 0; i < SNLED27351_LED_CONTROL_REGISTER_COUNT; i++) {
|
||||
snled27351_write_register(addr, i, g_led_control_registers[index][i]);
|
||||
}
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user