mirror of
https://github.com/qmk/qmk_firmware.git
synced 2025-07-16 21:01:31 +00:00
Added reliability patches to the AVRISP-MKII Clone project's PDI/TPI protocols (thanks to Justin Mattair).
This commit is contained in:
parent
c15eaa5dae
commit
c6d6bdae0a
@ -24,7 +24,7 @@
|
|||||||
* - Core:
|
* - Core:
|
||||||
* - None
|
* - None
|
||||||
* - Library Applications:
|
* - Library Applications:
|
||||||
* - None
|
* - Added reliability patches to the AVRISP-MKII Clone project's PDI/TPI protocols (thanks to Justin Mattair)
|
||||||
*
|
*
|
||||||
* \section Sec_ChangeLog111009 Version 111009
|
* \section Sec_ChangeLog111009 Version 111009
|
||||||
* <b>New:</b>
|
* <b>New:</b>
|
||||||
|
@ -149,13 +149,18 @@ void XMEGANVM_DisablePDI(void)
|
|||||||
{
|
{
|
||||||
XMEGANVM_WaitWhileNVMBusBusy();
|
XMEGANVM_WaitWhileNVMBusBusy();
|
||||||
|
|
||||||
/* Clear the RESET key in the RESET PDI register to allow the XMEGA to run */
|
/* Clear the RESET key in the RESET PDI register to allow the XMEGA to run - must perform this until the
|
||||||
XPROGTarget_SendByte(PDI_CMD_STCS | PDI_RESET_REG);
|
* change takes effect, as in some cases it takes multiple writes (silicon bug?).
|
||||||
XPROGTarget_SendByte(0x00);
|
*/
|
||||||
|
do
|
||||||
|
{
|
||||||
|
/* Clear reset register */
|
||||||
|
XPROGTarget_SendByte(PDI_CMD_STCS | PDI_RESET_REG);
|
||||||
|
XPROGTarget_SendByte(0x00);
|
||||||
|
|
||||||
/* Do it twice to make sure it takes effect (silicon bug?) */
|
/* Read back the reset register, check to see if it took effect */
|
||||||
XPROGTarget_SendByte(PDI_CMD_STCS | PDI_RESET_REG);
|
XPROGTarget_SendByte(PDI_CMD_LDCS | PDI_RESET_REG);
|
||||||
XPROGTarget_SendByte(0x00);
|
} while (XPROGTarget_ReceiveByte() != 0x00);
|
||||||
|
|
||||||
XPROGTarget_DisableTargetPDI();
|
XPROGTarget_DisableTargetPDI();
|
||||||
}
|
}
|
||||||
|
@ -92,7 +92,8 @@ void XPROGTarget_EnableTargetTPI(void)
|
|||||||
void XPROGTarget_DisableTargetPDI(void)
|
void XPROGTarget_DisableTargetPDI(void)
|
||||||
{
|
{
|
||||||
/* Switch to Rx mode to ensure that all pending transmissions are complete */
|
/* Switch to Rx mode to ensure that all pending transmissions are complete */
|
||||||
XPROGTarget_SetRxMode();
|
if (IsSending)
|
||||||
|
XPROGTarget_SetRxMode();
|
||||||
|
|
||||||
/* Turn off receiver and transmitter of the USART, clear settings */
|
/* Turn off receiver and transmitter of the USART, clear settings */
|
||||||
UCSR1A = ((1 << TXC1) | (1 << RXC1));
|
UCSR1A = ((1 << TXC1) | (1 << RXC1));
|
||||||
@ -108,7 +109,8 @@ void XPROGTarget_DisableTargetPDI(void)
|
|||||||
void XPROGTarget_DisableTargetTPI(void)
|
void XPROGTarget_DisableTargetTPI(void)
|
||||||
{
|
{
|
||||||
/* Switch to Rx mode to ensure that all pending transmissions are complete */
|
/* Switch to Rx mode to ensure that all pending transmissions are complete */
|
||||||
XPROGTarget_SetRxMode();
|
if (IsSending)
|
||||||
|
XPROGTarget_SetRxMode();
|
||||||
|
|
||||||
/* Turn off receiver and transmitter of the USART, clear settings */
|
/* Turn off receiver and transmitter of the USART, clear settings */
|
||||||
UCSR1A |= (1 << TXC1) | (1 << RXC1);
|
UCSR1A |= (1 << TXC1) | (1 << RXC1);
|
||||||
@ -169,19 +171,16 @@ void XPROGTarget_SendIdle(void)
|
|||||||
/* Wait for a full cycle of the clock */
|
/* Wait for a full cycle of the clock */
|
||||||
while (PIND & (1 << 5));
|
while (PIND & (1 << 5));
|
||||||
while (!(PIND & (1 << 5)));
|
while (!(PIND & (1 << 5)));
|
||||||
|
while (PIND & (1 << 5));
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
static void XPROGTarget_SetTxMode(void)
|
static void XPROGTarget_SetTxMode(void)
|
||||||
{
|
{
|
||||||
/* Need to do nothing for a full frame to send a BREAK - only one cycle should be needed, however
|
/* Wait for a full cycle of the clock */
|
||||||
* there are reports that sometimes the interface will get stuck in some environments. */
|
while (PIND & (1 << 5));
|
||||||
for (uint8_t i = 0; i < BITS_IN_USART_FRAME; i++)
|
while (!(PIND & (1 << 5)));
|
||||||
{
|
while (PIND & (1 << 5));
|
||||||
/* Wait for a full cycle of the clock */
|
|
||||||
while (PIND & (1 << 5));
|
|
||||||
while (!(PIND & (1 << 5)));
|
|
||||||
}
|
|
||||||
|
|
||||||
PORTD |= (1 << 3);
|
PORTD |= (1 << 3);
|
||||||
DDRD |= (1 << 3);
|
DDRD |= (1 << 3);
|
||||||
|
Loading…
Reference in New Issue
Block a user