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https://github.com/qmk/qmk_firmware.git
synced 2025-06-29 04:22:09 +00:00
Cleanup and partially fix AVRISP-MKII project's TPI programming support.
This commit is contained in:
parent
857381185d
commit
74b6993d66
@ -392,7 +392,7 @@ bool RNDIS_Host_IsPacketReceived(USB_ClassInfo_RNDIS_Host_t* const RNDISInterfac
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Pipe_Unfreeze();
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Pipe_Unfreeze();
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PacketWaiting = Pipe_IsINReceived();
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PacketWaiting = (Pipe_IsINReceived() && Pipe_BytesInPipe());
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Pipe_Freeze();
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Pipe_Freeze();
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@ -412,6 +412,9 @@ uint8_t RNDIS_Host_ReadPacket(USB_ClassInfo_RNDIS_Host_t* const RNDISInterfaceIn
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if (!(Pipe_IsReadWriteAllowed()))
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if (!(Pipe_IsReadWriteAllowed()))
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{
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{
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if (Pipe_IsINReceived())
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Pipe_ClearIN();
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*PacketLength = 0;
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*PacketLength = 0;
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Pipe_Freeze();
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Pipe_Freeze();
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return PIPE_RWSTREAM_NoError;
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return PIPE_RWSTREAM_NoError;
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@ -419,19 +422,37 @@ uint8_t RNDIS_Host_ReadPacket(USB_ClassInfo_RNDIS_Host_t* const RNDISInterfaceIn
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RNDIS_Packet_Message_t DeviceMessage;
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RNDIS_Packet_Message_t DeviceMessage;
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if (Pipe_BytesInPipe() < sizeof(RNDIS_Packet_Message_t))
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{
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printf("*SIZE YARG: %d*\r\n", Pipe_BytesInPipe());
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*PacketLength = 0;
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Pipe_ClearIN();
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return RNDIS_COMMAND_FAILED;
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}
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if ((ErrorCode = Pipe_Read_Stream_LE(&DeviceMessage, sizeof(RNDIS_Packet_Message_t),
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if ((ErrorCode = Pipe_Read_Stream_LE(&DeviceMessage, sizeof(RNDIS_Packet_Message_t),
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NO_STREAM_CALLBACK)) != PIPE_RWSTREAM_NoError)
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NO_STREAM_CALLBACK)) != PIPE_RWSTREAM_NoError)
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{
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{
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return ErrorCode;
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return ErrorCode;
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}
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}
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if (DeviceMessage.MessageType != REMOTE_NDIS_PACKET_MSG)
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{
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printf("****YARG****\r\n");
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*PacketLength = 0;
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Pipe_ClearIN();
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return RNDIS_COMMAND_FAILED;
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}
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*PacketLength = (uint16_t)DeviceMessage.DataLength;
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*PacketLength = (uint16_t)DeviceMessage.DataLength;
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Pipe_Discard_Stream(DeviceMessage.DataOffset - (sizeof(RNDIS_Packet_Message_t) - sizeof(RNDIS_Message_Header_t)),
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Pipe_Discard_Stream(DeviceMessage.DataOffset - (sizeof(RNDIS_Packet_Message_t) - sizeof(RNDIS_Message_Header_t)),
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NO_STREAM_CALLBACK);
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NO_STREAM_CALLBACK);
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Pipe_Read_Stream_LE(Buffer, *PacketLength, NO_STREAM_CALLBACK);
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Pipe_Read_Stream_LE(Buffer, *PacketLength, NO_STREAM_CALLBACK);
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Pipe_ClearIN();
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if (!(Pipe_BytesInPipe()))
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Pipe_ClearIN();
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Pipe_Freeze();
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Pipe_Freeze();
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@ -455,18 +476,22 @@ uint8_t RNDIS_Host_SendPacket(USB_ClassInfo_RNDIS_Host_t* const RNDISInterfaceIn
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Pipe_SelectPipe(RNDISInterfaceInfo->Config.DataOUTPipeNumber);
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Pipe_SelectPipe(RNDISInterfaceInfo->Config.DataOUTPipeNumber);
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}
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}
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Pipe_Unfreeze();
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RNDIS_Packet_Message_t DeviceMessage;
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RNDIS_Packet_Message_t DeviceMessage;
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DeviceMessage.MessageType = REMOTE_NDIS_PACKET_MSG;
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memset(&DeviceMessage, 0, sizeof(RNDIS_Packet_Message_t));
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DeviceMessage.MessageType = REMOTE_NDIS_PACKET_MSG;
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DeviceMessage.MessageLength = (sizeof(RNDIS_Packet_Message_t) + PacketLength);
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DeviceMessage.MessageLength = (sizeof(RNDIS_Packet_Message_t) + PacketLength);
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DeviceMessage.DataOffset = (sizeof(RNDIS_Packet_Message_t) - sizeof(RNDIS_Message_Header_t));
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DeviceMessage.DataOffset = (sizeof(RNDIS_Packet_Message_t) - sizeof(RNDIS_Message_Header_t));
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DeviceMessage.DataLength = PacketLength;
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DeviceMessage.DataLength = PacketLength;
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Pipe_Unfreeze();
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if ((ErrorCode = Pipe_Write_Stream_LE(&DeviceMessage, sizeof(RNDIS_Packet_Message_t),
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if ((ErrorCode = Pipe_Write_Stream_LE(&DeviceMessage, sizeof(RNDIS_Packet_Message_t),
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NO_STREAM_CALLBACK)) != PIPE_RWSTREAM_NoError)
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NO_STREAM_CALLBACK)) != PIPE_RWSTREAM_NoError)
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{
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{
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if (RNDISInterfaceInfo->State.BidirectionalDataEndpoints)
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Pipe_SetPipeToken(PIPE_TOKEN_IN);
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return ErrorCode;
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return ErrorCode;
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}
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}
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@ -40,7 +40,7 @@
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#warning TPI Protocol support is currently incomplete and is not suitable for general use.
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#warning TPI Protocol support is currently incomplete and is not suitable for general use.
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/** Sends the given pointer address to the target's TPI pointer register */
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/** Sends the given pointer address to the target's TPI pointer register */
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void TINYNVM_SendPointerAddress(const uint16_t AbsoluteAddress)
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static void TINYNVM_SendPointerAddress(const uint16_t AbsoluteAddress)
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{
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{
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/* Send the given 16-bit address to the target, LSB first */
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/* Send the given 16-bit address to the target, LSB first */
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XPROGTarget_SendByte(TPI_CMD_SSTPR | 0);
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XPROGTarget_SendByte(TPI_CMD_SSTPR | 0);
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@ -49,6 +49,28 @@ void TINYNVM_SendPointerAddress(const uint16_t AbsoluteAddress)
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XPROGTarget_SendByte(((uint8_t*)&AbsoluteAddress)[1]);
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XPROGTarget_SendByte(((uint8_t*)&AbsoluteAddress)[1]);
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}
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}
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/** Sends a SIN command to the target with the specified I/O address, ready for the data byte to be written.
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*
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* \param Address 6-bit I/O address to write to in the target's I/O memory space
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*/
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static void TINYNVM_SendReadNVMRegister(uint8_t Address)
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{
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/* The TPI command for reading from the I/O space uses wierd addressing, where the I/O address's upper
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* two bits of the 6-bit address are shifted left once */
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XPROGTarget_SendByte(TPI_CMD_SIN | ((Address & 0x30) << 1) | (Address & 0x0F));
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}
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/** Sends a SOUT command to the target with the specified I/O address, ready for the data byte to be read.
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*
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* \param Address 6-bit I/O address to read from in the target's I/O memory space
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*/
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static void TINYNVM_SendWriteNVMRegister(uint8_t Address)
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{
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/* The TPI command for writing to the I/O space uses wierd addressing, where the I/O address's upper
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* two bits of the 6-bit address are shifted left once */
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XPROGTarget_SendByte(TPI_CMD_SOUT | ((Address & 0x30) << 1) | (Address & 0x0F));
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}
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/** Busy-waits while the NVM controller is busy performing a NVM operation, such as a FLASH page read.
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/** Busy-waits while the NVM controller is busy performing a NVM operation, such as a FLASH page read.
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*
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*
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* \return Boolean true if the NVM controller became ready within the timeout period, false otherwise
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* \return Boolean true if the NVM controller became ready within the timeout period, false otherwise
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@ -78,7 +100,7 @@ bool TINYNVM_WaitWhileNVMControllerBusy(void)
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while (TimeoutMSRemaining)
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while (TimeoutMSRemaining)
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{
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{
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/* Send the SIN command to read the TPI STATUS register to see the NVM bus is active */
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/* Send the SIN command to read the TPI STATUS register to see the NVM bus is active */
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XPROGTarget_SendByte(TPI_CMD_SIN | XPROG_Param_NVMCSRRegAddr);
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TINYNVM_SendReadNVMRegister(XPROG_Param_NVMCSRRegAddr);
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if (XPROGTarget_ReceiveByte() & (1 << 7))
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if (XPROGTarget_ReceiveByte() & (1 << 7))
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return true;
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return true;
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}
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}
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@ -101,7 +123,7 @@ bool TINYNVM_ReadMemory(const uint32_t ReadAddress, uint8_t* ReadBuffer, uint16_
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return false;
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return false;
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/* Set the NVM control register to the NO OP command for memory reading */
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/* Set the NVM control register to the NO OP command for memory reading */
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XPROGTarget_SendByte(TPI_CMD_SOUT | XPROG_Param_NVMCMDRegAddr);
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TINYNVM_SendWriteNVMRegister(XPROG_Param_NVMCMDRegAddr);
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XPROGTarget_SendByte(TINY_NVM_CMD_NOOP);
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XPROGTarget_SendByte(TINY_NVM_CMD_NOOP);
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/* Send the address of the location to read from */
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/* Send the address of the location to read from */
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@ -132,7 +154,7 @@ bool TINYNVM_WriteMemory(const uint32_t WriteAddress, const uint8_t* WriteBuffer
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return false;
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return false;
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/* Set the NVM control register to the WORD WRITE command for memory reading */
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/* Set the NVM control register to the WORD WRITE command for memory reading */
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XPROGTarget_SendByte(TPI_CMD_SOUT | XPROG_Param_NVMCMDRegAddr);
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TINYNVM_SendWriteNVMRegister(XPROG_Param_NVMCMDRegAddr);
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XPROGTarget_SendByte(TINY_NVM_CMD_WORDWRITE);
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XPROGTarget_SendByte(TINY_NVM_CMD_WORDWRITE);
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/* Send the address of the location to write to */
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/* Send the address of the location to write to */
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@ -159,7 +181,7 @@ bool TINYNVM_EraseMemory(void)
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return false;
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return false;
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/* Set the NVM control register to the CHIP ERASE command to erase the target */
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/* Set the NVM control register to the CHIP ERASE command to erase the target */
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XPROGTarget_SendByte(TPI_CMD_SOUT | XPROG_Param_NVMCMDRegAddr);
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TINYNVM_SendWriteNVMRegister(XPROG_Param_NVMCMDRegAddr);
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XPROGTarget_SendByte(TINY_NVM_CMD_CHIPERASE);
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XPROGTarget_SendByte(TINY_NVM_CMD_CHIPERASE);
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/* Wait until the NVM bus is ready again */
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/* Wait until the NVM bus is ready again */
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@ -62,10 +62,15 @@
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#define TINY_NVM_CMD_WORDWRITE 0x1D
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#define TINY_NVM_CMD_WORDWRITE 0x1D
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/* Function Prototypes: */
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/* Function Prototypes: */
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void TINYNVM_SendPointerAddress(const uint16_t AbsoluteAddress);
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bool TINYNVM_WaitWhileNVMBusBusy(void);
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bool TINYNVM_WaitWhileNVMBusBusy(void);
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bool TINYNVM_ReadMemory(const uint32_t ReadAddress, uint8_t* ReadBuffer, uint16_t ReadLength);
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bool TINYNVM_ReadMemory(const uint32_t ReadAddress, uint8_t* ReadBuffer, uint16_t ReadLength);
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bool TINYNVM_WriteMemory(const uint32_t WriteAddress, const uint8_t* WriteBuffer, uint16_t WriteLength);
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bool TINYNVM_WriteMemory(const uint32_t WriteAddress, const uint8_t* WriteBuffer, uint16_t WriteLength);
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bool TINYNVM_EraseMemory(void);
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bool TINYNVM_EraseMemory(void);
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#if defined(INCLUDE_FROM_TINYNVM_C)
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static void TINYNVM_SendReadNVMRegister(uint8_t Address);
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static void TINYNVM_SendWriteNVMRegister(uint8_t Address);
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static void TINYNVM_SendPointerAddress(const uint16_t AbsoluteAddress);
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#endif
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#endif
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#endif
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#if defined(ENABLE_XPROG_PROTOCOL) || defined(__DOXYGEN__)
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#if defined(ENABLE_XPROG_PROTOCOL) || defined(__DOXYGEN__)
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/** Sends the given NVM register address to the target.
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*
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* \param[in] Register NVM register whose absolute address is to be sent
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*/
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void XMEGANVM_SendNVMRegAddress(const uint8_t Register)
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{
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/* Determine the absolute register address from the NVM base memory address and the NVM register address */
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uint32_t Address = XPROG_Param_NVMBase | Register;
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/* Send the calculated 32-bit address to the target, LSB first */
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XMEGANVM_SendAddress(Address);
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}
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/** Sends the given 32-bit absolute address to the target.
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/** Sends the given 32-bit absolute address to the target.
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*
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*
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* \param[in] AbsoluteAddress Absolute address to send to the target
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* \param[in] AbsoluteAddress Absolute address to send to the target
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*/
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*/
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void XMEGANVM_SendAddress(const uint32_t AbsoluteAddress)
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static void XMEGANVM_SendAddress(const uint32_t AbsoluteAddress)
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{
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{
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/* Send the given 32-bit address to the target, LSB first */
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/* Send the given 32-bit address to the target, LSB first */
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XPROGTarget_SendByte(((uint8_t*)&AbsoluteAddress)[0]);
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XPROGTarget_SendByte(((uint8_t*)&AbsoluteAddress)[0]);
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@ -64,6 +51,19 @@ void XMEGANVM_SendAddress(const uint32_t AbsoluteAddress)
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XPROGTarget_SendByte(((uint8_t*)&AbsoluteAddress)[3]);
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XPROGTarget_SendByte(((uint8_t*)&AbsoluteAddress)[3]);
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}
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}
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/** Sends the given NVM register address to the target.
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*
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* \param[in] Register NVM register whose absolute address is to be sent
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*/
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static void XMEGANVM_SendNVMRegAddress(const uint8_t Register)
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{
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/* Determine the absolute register address from the NVM base memory address and the NVM register address */
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uint32_t Address = XPROG_Param_NVMBase | Register;
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/* Send the calculated 32-bit address to the target, LSB first */
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XMEGANVM_SendAddress(Address);
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}
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/** Busy-waits while the NVM controller is busy performing a NVM operation, such as a FLASH page read or CRC
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/** Busy-waits while the NVM controller is busy performing a NVM operation, such as a FLASH page read or CRC
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* calculation.
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* calculation.
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*
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*
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@ -106,8 +106,6 @@
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#define XMEGA_NVM_CMD_READEEPROM 0x06
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#define XMEGA_NVM_CMD_READEEPROM 0x06
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/* Function Prototypes: */
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/* Function Prototypes: */
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void XMEGANVM_SendNVMRegAddress(const uint8_t Register);
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void XMEGANVM_SendAddress(const uint32_t AbsoluteAddress);
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bool XMEGANVM_WaitWhileNVMBusBusy(void);
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bool XMEGANVM_WaitWhileNVMBusBusy(void);
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bool XMEGANVM_WaitWhileNVMControllerBusy(void);
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bool XMEGANVM_WaitWhileNVMControllerBusy(void);
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bool XMEGANVM_GetMemoryCRC(const uint8_t CRCCommand, uint32_t* const CRCDest);
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bool XMEGANVM_GetMemoryCRC(const uint8_t CRCCommand, uint32_t* const CRCDest);
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const uint8_t* WriteBuffer, uint16_t WriteSize);
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const uint8_t* WriteBuffer, uint16_t WriteSize);
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bool XMEGANVM_EraseMemory(const uint8_t EraseCommand, const uint32_t Address);
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bool XMEGANVM_EraseMemory(const uint8_t EraseCommand, const uint32_t Address);
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#if defined(INCLUDE_FROM_XMEGANVM_C)
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static void XMEGANVM_SendNVMRegAddress(const uint8_t Register);
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static void XMEGANVM_SendAddress(const uint32_t AbsoluteAddress);
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#endif
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#endif
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#endif
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