mirror of
https://github.com/qmk/qmk_firmware.git
synced 2024-11-22 03:19:24 +00:00
Align ld scripts with common config
This commit is contained in:
Drashna Jael're
parent
79a400c26b
commit
65363c6102
@ -5,6 +5,9 @@
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*/
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*/
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f4xx_flash_size = 256k;
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f4xx_flash_size = 256k;
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f4xx_ram_size = 64k;
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f4xx_ram1_size = 64k;
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f4xx_ram2_size = 0;
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f4xx_ram4_size = 0;
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f4xx_ram5_size = 0;
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INCLUDE stm32f4xx_common.ld
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INCLUDE stm32f4xx_common.ld
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@ -5,6 +5,9 @@
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*/
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*/
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f4xx_flash_size = 256k;
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f4xx_flash_size = 256k;
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f4xx_ram_size = 64k;
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f4xx_ram1_size = 64k;
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f4xx_ram2_size = 0;
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f4xx_ram4_size = 0;
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f4xx_ram5_size = 0;
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INCLUDE stm32f4xx_tinyuf2_common.ld
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INCLUDE stm32f4xx_tinyuf2_common.ld
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@ -5,6 +5,9 @@
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*/
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*/
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f4xx_flash_size = 512k;
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f4xx_flash_size = 512k;
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f4xx_ram_size = 96k;
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f4xx_ram1_size = 96k;
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f4xx_ram2_size = 0;
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f4xx_ram4_size = 0;
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f4xx_ram5_size = 0;
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INCLUDE stm32f4xx_common.ld
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INCLUDE stm32f4xx_common.ld
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@ -5,6 +5,9 @@
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*/
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*/
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f4xx_flash_size = 512k;
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f4xx_flash_size = 512k;
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f4xx_ram_size = 96k;
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f4xx_ram1_size = 96k;
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f4xx_ram2_size = 0;
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f4xx_ram4_size = 0;
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f4xx_ram5_size = 0;
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INCLUDE stm32f4xx_tinyuf2_common.ld
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INCLUDE stm32f4xx_tinyuf2_common.ld
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@ -1,86 +1,13 @@
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/*
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/*
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ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
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* Copyright 2006..2018 Giovanni Di Sirio
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* Copyright 2022 QMK contributors
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Licensed under the Apache License, Version 2.0 (the "License");
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* SPDX-License-Identifier: GPL-2.0-or-later
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/*
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* STM32F405xG memory setup.
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* Note: Use of ram1 and ram2 is mutually exclusive with use of ram0.
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*/
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*/
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MEMORY
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{
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flash0 (rx) : org = 0x08000000, len = 16k /* Sector 0 - Init code as ROM bootloader assumes application starts here */
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flash1 (rx) : org = 0x08004000, len = 16k /* Sector 1 - Emulated eeprom */
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flash2 (rx) : org = 0x08008000, len = 1M - 32k /* Sector 2..6 - Rest of firmware */
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flash3 (rx) : org = 0x00000000, len = 0
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flash4 (rx) : org = 0x00000000, len = 0
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flash5 (rx) : org = 0x00000000, len = 0
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flash6 (rx) : org = 0x00000000, len = 0
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flash7 (rx) : org = 0x00000000, len = 0
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ram0 (wx) : org = 0x20000000, len = 128k /* SRAM1 + SRAM2 */
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ram1 (wx) : org = 0x20000000, len = 112k /* SRAM1 */
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ram2 (wx) : org = 0x2001C000, len = 16k /* SRAM2 */
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ram3 (wx) : org = 0x00000000, len = 0
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ram4 (wx) : org = 0x10000000, len = 64k /* CCM SRAM */
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ram5 (wx) : org = 0x40024000, len = 4k /* BCKP SRAM */
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ram6 (wx) : org = 0x00000000, len = 0
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ram7 (wx) : org = 0x00000000, len = 0
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}
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/* For each data/text section two region are defined, a virtual region
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f4xx_flash_size = 1M;
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and a load region (_LMA suffix).*/
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f4xx_ram1_size = 112k;
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f4xx_ram2_size = 16k;
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f4xx_ram4_size = 64k;
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f4xx_ram5_size = 4k;
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/* Flash region to be used for exception vectors.*/
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INCLUDE stm32f4xx_common.ld
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REGION_ALIAS("VECTORS_FLASH", flash0);
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REGION_ALIAS("VECTORS_FLASH_LMA", flash0);
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/* Flash region to be used for constructors and destructors.*/
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REGION_ALIAS("XTORS_FLASH", flash2);
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REGION_ALIAS("XTORS_FLASH_LMA", flash2);
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/* Flash region to be used for code text.*/
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REGION_ALIAS("TEXT_FLASH", flash2);
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REGION_ALIAS("TEXT_FLASH_LMA", flash2);
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/* Flash region to be used for read only data.*/
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REGION_ALIAS("RODATA_FLASH", flash2);
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REGION_ALIAS("RODATA_FLASH_LMA", flash2);
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/* Flash region to be used for various.*/
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REGION_ALIAS("VARIOUS_FLASH", flash2);
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REGION_ALIAS("VARIOUS_FLASH_LMA", flash2);
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/* Flash region to be used for RAM(n) initialization data.*/
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REGION_ALIAS("RAM_INIT_FLASH_LMA", flash2);
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/* RAM region to be used for Main stack. This stack accommodates the processing
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of all exceptions and interrupts.*/
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REGION_ALIAS("MAIN_STACK_RAM", ram0);
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/* RAM region to be used for the process stack. This is the stack used by
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the main() function.*/
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REGION_ALIAS("PROCESS_STACK_RAM", ram0);
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/* RAM region to be used for data segment.*/
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REGION_ALIAS("DATA_RAM", ram0);
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REGION_ALIAS("DATA_RAM_LMA", flash2);
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/* RAM region to be used for BSS segment.*/
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REGION_ALIAS("BSS_RAM", ram0);
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/* RAM region to be used for the default heap.*/
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REGION_ALIAS("HEAP_RAM", ram0);
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/* Generic rules inclusion.*/
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INCLUDE rules.ld
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@ -1,89 +1,13 @@
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/*
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/*
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ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
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* Copyright 2006..2018 Giovanni Di Sirio
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* Copyright 2022 QMK contributors
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Licensed under the Apache License, Version 2.0 (the "License");
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* SPDX-License-Identifier: GPL-2.0-or-later
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/*
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* STM32F405xG memory setup.
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* Note: Use of ram1 and ram2 is mutually exclusive with use of ram0.
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*/
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*/
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MEMORY
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{
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flash0 (rx) : org = 0x08000000 + 64k, len = 1M - 64k /* tinyuf2 bootloader requires app to be located at 64k offset for this MCU */
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flash1 (rx) : org = 0x00000000, len = 0
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flash2 (rx) : org = 0x00000000, len = 0
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flash3 (rx) : org = 0x00000000, len = 0
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flash4 (rx) : org = 0x00000000, len = 0
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flash5 (rx) : org = 0x00000000, len = 0
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flash6 (rx) : org = 0x00000000, len = 0
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flash7 (rx) : org = 0x00000000, len = 0
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ram0 (wx) : org = 0x20000000, len = 128k /* SRAM1 + SRAM2 */
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ram1 (wx) : org = 0x20000000, len = 112k /* SRAM1 */
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ram2 (wx) : org = 0x2001C000, len = 16k /* SRAM2 */
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ram3 (wx) : org = 0x00000000, len = 0
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ram4 (wx) : org = 0x10000000, len = 64k /* CCM SRAM */
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ram5 (wx) : org = 0x40024000, len = 4k /* BCKP SRAM */
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ram6 (wx) : org = 0x00000000, len = 0
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ram7 (wx) : org = 0x00000000, len = 0
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}
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/* For each data/text section two region are defined, a virtual region
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f4xx_flash_size = 1M;
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and a load region (_LMA suffix).*/
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f4xx_ram1_size = 112k;
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f4xx_ram2_size = 16k;
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f4xx_ram4_size = 64k;
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f4xx_ram5_size = 4k;
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/* Flash region to be used for exception vectors.*/
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INCLUDE stm32f4xx_tinyuf2_common.ld
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REGION_ALIAS("VECTORS_FLASH", flash0);
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REGION_ALIAS("VECTORS_FLASH_LMA", flash0);
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/* Flash region to be used for constructors and destructors.*/
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REGION_ALIAS("XTORS_FLASH", flash0);
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REGION_ALIAS("XTORS_FLASH_LMA", flash0);
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/* Flash region to be used for code text.*/
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REGION_ALIAS("TEXT_FLASH", flash0);
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REGION_ALIAS("TEXT_FLASH_LMA", flash0);
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/* Flash region to be used for read only data.*/
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REGION_ALIAS("RODATA_FLASH", flash0);
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REGION_ALIAS("RODATA_FLASH_LMA", flash0);
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/* Flash region to be used for various.*/
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REGION_ALIAS("VARIOUS_FLASH", flash0);
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REGION_ALIAS("VARIOUS_FLASH_LMA", flash0);
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/* Flash region to be used for RAM(n) initialization data.*/
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REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0);
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/* RAM region to be used for Main stack. This stack accommodates the processing
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of all exceptions and interrupts.*/
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REGION_ALIAS("MAIN_STACK_RAM", ram0);
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/* RAM region to be used for the process stack. This is the stack used by
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the main() function.*/
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REGION_ALIAS("PROCESS_STACK_RAM", ram0);
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/* RAM region to be used for data segment.*/
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REGION_ALIAS("DATA_RAM", ram0);
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REGION_ALIAS("DATA_RAM_LMA", flash0);
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/* RAM region to be used for BSS segment.*/
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REGION_ALIAS("BSS_RAM", ram0);
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/* RAM region to be used for the default heap.*/
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REGION_ALIAS("HEAP_RAM", ram0);
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/* Generic rules inclusion.*/
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INCLUDE rules.ld
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/* TinyUF2 bootloader reset support */
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_board_dfu_dbl_tap = ORIGIN(ram0) + 64k - 4; /* this is based off the linker file for tinyuf2 */
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@ -1,86 +1,13 @@
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/*
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/*
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ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
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* Copyright 2006..2018 Giovanni Di Sirio
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* Copyright 2022 QMK contributors
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Licensed under the Apache License, Version 2.0 (the "License");
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* SPDX-License-Identifier: GPL-2.0-or-later
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you may not use this file except in compliance with the License.
|
|
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You may obtain a copy of the License at
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|
|
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http://www.apache.org/licenses/LICENSE-2.0
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|
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Unless required by applicable law or agreed to in writing, software
|
|
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distributed under the License is distributed on an "AS IS" BASIS,
|
|
||||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
|
||||||
See the License for the specific language governing permissions and
|
|
||||||
limitations under the License.
|
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||||||
*/
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|
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/*
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* STM32F407xE memory setup.
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* Note: Use of ram1 and ram2 is mutually exclusive with use of ram0.
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*/
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*/
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MEMORY
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{
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flash0 (rx) : org = 0x08000000, len = 16k /* Sector 0 - Init code as ROM bootloader assumes application starts here */
|
|
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flash1 (rx) : org = 0x08004000, len = 16k /* Sector 1 - Emulated eeprom */
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|
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flash2 (rx) : org = 0x08000000, len = 512k - 32k /* Sector 2..6 - Rest of firmware */
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flash3 (rx) : org = 0x00000000, len = 0
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flash4 (rx) : org = 0x00000000, len = 0
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flash5 (rx) : org = 0x00000000, len = 0
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flash6 (rx) : org = 0x00000000, len = 0
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|
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flash7 (rx) : org = 0x00000000, len = 0
|
|
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ram0 (wx) : org = 0x20000000, len = 128k /* SRAM1 + SRAM2 */
|
|
||||||
ram1 (wx) : org = 0x20000000, len = 112k /* SRAM1 */
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|
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ram2 (wx) : org = 0x2001C000, len = 16k /* SRAM2 */
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|
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ram3 (wx) : org = 0x00000000, len = 0
|
|
||||||
ram4 (wx) : org = 0x10000000, len = 64k /* CCM SRAM */
|
|
||||||
ram5 (wx) : org = 0x40024000, len = 4k /* BCKP SRAM */
|
|
||||||
ram6 (wx) : org = 0x00000000, len = 0
|
|
||||||
ram7 (wx) : org = 0x00000000, len = 0
|
|
||||||
}
|
|
||||||
|
|
||||||
/* For each data/text section two region are defined, a virtual region
|
f4xx_flash_size = 512k;
|
||||||
and a load region (_LMA suffix).*/
|
f4xx_ram1_size = 112k;
|
||||||
|
f4xx_ram2_size = 16k;
|
||||||
|
f4xx_ram4_size = 64k;
|
||||||
|
f4xx_ram5_size = 4k;
|
||||||
|
|
||||||
/* Flash region to be used for exception vectors.*/
|
INCLUDE stm32f4xx_common.ld
|
||||||
REGION_ALIAS("VECTORS_FLASH", flash0);
|
|
||||||
REGION_ALIAS("VECTORS_FLASH_LMA", flash0);
|
|
||||||
|
|
||||||
/* Flash region to be used for constructors and destructors.*/
|
|
||||||
REGION_ALIAS("XTORS_FLASH", flash2);
|
|
||||||
REGION_ALIAS("XTORS_FLASH_LMA", flash2);
|
|
||||||
|
|
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/* Flash region to be used for code text.*/
|
|
||||||
REGION_ALIAS("TEXT_FLASH", flash2);
|
|
||||||
REGION_ALIAS("TEXT_FLASH_LMA", flash2);
|
|
||||||
|
|
||||||
/* Flash region to be used for read only data.*/
|
|
||||||
REGION_ALIAS("RODATA_FLASH", flash2);
|
|
||||||
REGION_ALIAS("RODATA_FLASH_LMA", flash2);
|
|
||||||
|
|
||||||
/* Flash region to be used for various.*/
|
|
||||||
REGION_ALIAS("VARIOUS_FLASH", flash2);
|
|
||||||
REGION_ALIAS("VARIOUS_FLASH_LMA", flash2);
|
|
||||||
|
|
||||||
/* Flash region to be used for RAM(n) initialization data.*/
|
|
||||||
REGION_ALIAS("RAM_INIT_FLASH_LMA", flash2);
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||||||
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|
||||||
/* RAM region to be used for Main stack. This stack accommodates the processing
|
|
||||||
of all exceptions and interrupts.*/
|
|
||||||
REGION_ALIAS("MAIN_STACK_RAM", ram0);
|
|
||||||
|
|
||||||
/* RAM region to be used for the process stack. This is the stack used by
|
|
||||||
the main() function.*/
|
|
||||||
REGION_ALIAS("PROCESS_STACK_RAM", ram0);
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|
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/* RAM region to be used for data segment.*/
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REGION_ALIAS("DATA_RAM", ram0);
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|
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REGION_ALIAS("DATA_RAM_LMA", flash2);
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|
|
||||||
/* RAM region to be used for BSS segment.*/
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REGION_ALIAS("BSS_RAM", ram0);
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|
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/* RAM region to be used for the default heap.*/
|
|
||||||
REGION_ALIAS("HEAP_RAM", ram0);
|
|
||||||
|
|
||||||
/* Generic rules inclusion.*/
|
|
||||||
INCLUDE rules.ld
|
|
||||||
|
|||||||
@ -1,86 +1,13 @@
|
|||||||
/*
|
/*
|
||||||
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
|
* Copyright 2006..2018 Giovanni Di Sirio
|
||||||
|
* Copyright 2022 QMK contributors
|
||||||
Licensed under the Apache License, Version 2.0 (the "License");
|
* SPDX-License-Identifier: GPL-2.0-or-later
|
||||||
you may not use this file except in compliance with the License.
|
|
||||||
You may obtain a copy of the License at
|
|
||||||
|
|
||||||
http://www.apache.org/licenses/LICENSE-2.0
|
|
||||||
|
|
||||||
Unless required by applicable law or agreed to in writing, software
|
|
||||||
distributed under the License is distributed on an "AS IS" BASIS,
|
|
||||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
|
||||||
See the License for the specific language governing permissions and
|
|
||||||
limitations under the License.
|
|
||||||
*/
|
|
||||||
|
|
||||||
/*
|
|
||||||
* STM32F407xE memory setup.
|
|
||||||
* Note: Use of ram1 and ram2 is mutually exclusive with use of ram0.
|
|
||||||
*/
|
*/
|
||||||
MEMORY
|
|
||||||
{
|
|
||||||
flash0 (rx) : org = 0x08000000 + 64k, len = 512k - 64k /* tinyuf2 bootloader requires app to be located at 64k offset for this MCU */
|
|
||||||
flash1 (rx) : org = 0x00000000, len = 0
|
|
||||||
flash2 (rx) : org = 0x00000000, len = 0
|
|
||||||
flash3 (rx) : org = 0x00000000, len = 0
|
|
||||||
flash4 (rx) : org = 0x00000000, len = 0
|
|
||||||
flash5 (rx) : org = 0x00000000, len = 0
|
|
||||||
flash6 (rx) : org = 0x00000000, len = 0
|
|
||||||
flash7 (rx) : org = 0x00000000, len = 0
|
|
||||||
ram0 (wx) : org = 0x20000000, len = 128k /* SRAM1 + SRAM2 */
|
|
||||||
ram1 (wx) : org = 0x20000000, len = 112k /* SRAM1 */
|
|
||||||
ram2 (wx) : org = 0x2001C000, len = 16k /* SRAM2 */
|
|
||||||
ram3 (wx) : org = 0x00000000, len = 0
|
|
||||||
ram4 (wx) : org = 0x10000000, len = 64k /* CCM SRAM */
|
|
||||||
ram5 (wx) : org = 0x40024000, len = 4k /* BCKP SRAM */
|
|
||||||
ram6 (wx) : org = 0x00000000, len = 0
|
|
||||||
ram7 (wx) : org = 0x00000000, len = 0
|
|
||||||
}
|
|
||||||
|
|
||||||
/* For each data/text section two region are defined, a virtual region
|
f4xx_flash_size = 512k;
|
||||||
and a load region (_LMA suffix).*/
|
f4xx_ram1_size = 112k;
|
||||||
|
f4xx_ram2_size = 16k;
|
||||||
|
f4xx_ram4_size = 64k;
|
||||||
|
f4xx_ram5_size = 4k;
|
||||||
|
|
||||||
/* Flash region to be used for exception vectors.*/
|
INCLUDE stm32f4xx_tinyuf2_common.ld
|
||||||
REGION_ALIAS("VECTORS_FLASH", flash0);
|
|
||||||
REGION_ALIAS("VECTORS_FLASH_LMA", flash0);
|
|
||||||
|
|
||||||
/* Flash region to be used for constructors and destructors.*/
|
|
||||||
REGION_ALIAS("XTORS_FLASH", flash2);
|
|
||||||
REGION_ALIAS("XTORS_FLASH_LMA", flash2);
|
|
||||||
|
|
||||||
/* Flash region to be used for code text.*/
|
|
||||||
REGION_ALIAS("TEXT_FLASH", flash2);
|
|
||||||
REGION_ALIAS("TEXT_FLASH_LMA", flash2);
|
|
||||||
|
|
||||||
/* Flash region to be used for read only data.*/
|
|
||||||
REGION_ALIAS("RODATA_FLASH", flash2);
|
|
||||||
REGION_ALIAS("RODATA_FLASH_LMA", flash2);
|
|
||||||
|
|
||||||
/* Flash region to be used for various.*/
|
|
||||||
REGION_ALIAS("VARIOUS_FLASH", flash2);
|
|
||||||
REGION_ALIAS("VARIOUS_FLASH_LMA", flash2);
|
|
||||||
|
|
||||||
/* Flash region to be used for RAM(n) initialization data.*/
|
|
||||||
REGION_ALIAS("RAM_INIT_FLASH_LMA", flash2);
|
|
||||||
|
|
||||||
/* RAM region to be used for Main stack. This stack accommodates the processing
|
|
||||||
of all exceptions and interrupts.*/
|
|
||||||
REGION_ALIAS("MAIN_STACK_RAM", ram0);
|
|
||||||
|
|
||||||
/* RAM region to be used for the process stack. This is the stack used by
|
|
||||||
the main() function.*/
|
|
||||||
REGION_ALIAS("PROCESS_STACK_RAM", ram0);
|
|
||||||
|
|
||||||
/* RAM region to be used for data segment.*/
|
|
||||||
REGION_ALIAS("DATA_RAM", ram0);
|
|
||||||
REGION_ALIAS("DATA_RAM_LMA", flash2);
|
|
||||||
|
|
||||||
/* RAM region to be used for BSS segment.*/
|
|
||||||
REGION_ALIAS("BSS_RAM", ram0);
|
|
||||||
|
|
||||||
/* RAM region to be used for the default heap.*/
|
|
||||||
REGION_ALIAS("HEAP_RAM", ram0);
|
|
||||||
|
|
||||||
/* Generic rules inclusion.*/
|
|
||||||
INCLUDE rules.ld
|
|
||||||
|
|||||||
@ -5,6 +5,9 @@
|
|||||||
*/
|
*/
|
||||||
|
|
||||||
f4xx_flash_size = 256k;
|
f4xx_flash_size = 256k;
|
||||||
f4xx_ram_size = 128k;
|
f4xx_ram1_size = 128k;
|
||||||
|
f4xx_ram2_size = 0;
|
||||||
|
f4xx_ram4_size = 0;
|
||||||
|
f4xx_ram5_size = 0;
|
||||||
|
|
||||||
INCLUDE stm32f4xx_common.ld
|
INCLUDE stm32f4xx_common.ld
|
||||||
|
|||||||
@ -5,6 +5,9 @@
|
|||||||
*/
|
*/
|
||||||
|
|
||||||
f4xx_flash_size = 256k;
|
f4xx_flash_size = 256k;
|
||||||
f4xx_ram_size = 128k;
|
f4xx_ram1_size = 128k;
|
||||||
|
f4xx_ram2_size = 0;
|
||||||
|
f4xx_ram4_size = 0;
|
||||||
|
f4xx_ram5_size = 0;
|
||||||
|
|
||||||
INCLUDE stm32f4xx_tinyuf2_common.ld
|
INCLUDE stm32f4xx_tinyuf2_common.ld
|
||||||
|
|||||||
@ -5,6 +5,9 @@
|
|||||||
*/
|
*/
|
||||||
|
|
||||||
f4xx_flash_size = 512k;
|
f4xx_flash_size = 512k;
|
||||||
f4xx_ram_size = 128k;
|
f4xx_ram1_size = 128k;
|
||||||
|
f4xx_ram2_size = 0;
|
||||||
|
f4xx_ram4_size = 0;
|
||||||
|
f4xx_ram5_size = 0;
|
||||||
|
|
||||||
INCLUDE stm32f4xx_common.ld
|
INCLUDE stm32f4xx_common.ld
|
||||||
|
|||||||
@ -5,6 +5,9 @@
|
|||||||
*/
|
*/
|
||||||
|
|
||||||
f4xx_flash_size = 512k;
|
f4xx_flash_size = 512k;
|
||||||
f4xx_ram_size = 128k;
|
f4xx_ram1_size = 128k;
|
||||||
|
f4xx_ram2_size = 0;
|
||||||
|
f4xx_ram4_size = 0;
|
||||||
|
f4xx_ram5_size = 0;
|
||||||
|
|
||||||
INCLUDE stm32f4xx_tinyuf2_common.ld
|
INCLUDE stm32f4xx_tinyuf2_common.ld
|
||||||
|
|||||||
@ -1,86 +1,13 @@
|
|||||||
/*
|
/*
|
||||||
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
|
* Copyright 2006..2018 Giovanni Di Sirio
|
||||||
|
* Copyright 2022 QMK contributors
|
||||||
Licensed under the Apache License, Version 2.0 (the "License");
|
* SPDX-License-Identifier: GPL-2.0-or-later
|
||||||
you may not use this file except in compliance with the License.
|
|
||||||
You may obtain a copy of the License at
|
|
||||||
|
|
||||||
http://www.apache.org/licenses/LICENSE-2.0
|
|
||||||
|
|
||||||
Unless required by applicable law or agreed to in writing, software
|
|
||||||
distributed under the License is distributed on an "AS IS" BASIS,
|
|
||||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
|
||||||
See the License for the specific language governing permissions and
|
|
||||||
limitations under the License.
|
|
||||||
*/
|
|
||||||
|
|
||||||
/*
|
|
||||||
* ST32F446xE memory setup.
|
|
||||||
* Note: Use of ram1 and ram2 is mutually exclusive with use of ram0.
|
|
||||||
*/
|
*/
|
||||||
MEMORY
|
|
||||||
{
|
|
||||||
flash0 (rx) : org = 0x08000000, len = 16k /* Sector 0 - Init code as ROM bootloader assumes application starts here */
|
|
||||||
flash1 (rx) : org = 0x08004000, len = 16k /* Sector 1 - Emulated eeprom */
|
|
||||||
flash2 (rx) : org = 0x08000000, len = 512k - 32k /* Sector 2..6 - Rest of firmware */
|
|
||||||
flash3 (rx) : org = 0x00000000, len = 0
|
|
||||||
flash4 (rx) : org = 0x00000000, len = 0
|
|
||||||
flash5 (rx) : org = 0x00000000, len = 0
|
|
||||||
flash6 (rx) : org = 0x00000000, len = 0
|
|
||||||
flash7 (rx) : org = 0x00000000, len = 0
|
|
||||||
ram0 (wx) : org = 0x20000000, len = 128k /* SRAM1 + SRAM2 */
|
|
||||||
ram1 (wx) : org = 0x20000000, len = 112k /* SRAM1 */
|
|
||||||
ram2 (wx) : org = 0x00000000, len = 16k /* SRAM2 */
|
|
||||||
ram3 (wx) : org = 0x00000000, len = 0
|
|
||||||
ram4 (wx) : org = 0x00000000, len = 0
|
|
||||||
ram5 (wx) : org = 0x00000000, len = 0
|
|
||||||
ram6 (wx) : org = 0x00000000, len = 0
|
|
||||||
ram7 (wx) : org = 0x00000000, len = 0
|
|
||||||
}
|
|
||||||
|
|
||||||
/* For each data/text section two region are defined, a virtual region
|
f4xx_flash_size = 512k;
|
||||||
and a load region (_LMA suffix).*/
|
f4xx_ram1_size = 112k;
|
||||||
|
f4xx_ram2_size = 16k;
|
||||||
|
f4xx_ram4_size = 0;
|
||||||
|
f4xx_ram5_size = 0;
|
||||||
|
|
||||||
/* Flash region to be used for exception vectors.*/
|
INCLUDE stm32f4xx_common.ld
|
||||||
REGION_ALIAS("VECTORS_FLASH", flash0);
|
|
||||||
REGION_ALIAS("VECTORS_FLASH_LMA", flash0);
|
|
||||||
|
|
||||||
/* Flash region to be used for constructors and destructors.*/
|
|
||||||
REGION_ALIAS("XTORS_FLASH", flash2);
|
|
||||||
REGION_ALIAS("XTORS_FLASH_LMA", flash2);
|
|
||||||
|
|
||||||
/* Flash region to be used for code text.*/
|
|
||||||
REGION_ALIAS("TEXT_FLASH", flash2);
|
|
||||||
REGION_ALIAS("TEXT_FLASH_LMA", flash2);
|
|
||||||
|
|
||||||
/* Flash region to be used for read only data.*/
|
|
||||||
REGION_ALIAS("RODATA_FLASH", flash2);
|
|
||||||
REGION_ALIAS("RODATA_FLASH_LMA", flash2);
|
|
||||||
|
|
||||||
/* Flash region to be used for various.*/
|
|
||||||
REGION_ALIAS("VARIOUS_FLASH", flash2);
|
|
||||||
REGION_ALIAS("VARIOUS_FLASH_LMA", flash2);
|
|
||||||
|
|
||||||
/* Flash region to be used for RAM(n) initialization data.*/
|
|
||||||
REGION_ALIAS("RAM_INIT_FLASH_LMA", flash2);
|
|
||||||
|
|
||||||
/* RAM region to be used for Main stack. This stack accommodates the processing
|
|
||||||
of all exceptions and interrupts.*/
|
|
||||||
REGION_ALIAS("MAIN_STACK_RAM", ram0);
|
|
||||||
|
|
||||||
/* RAM region to be used for the process stack. This is the stack used by
|
|
||||||
the main() function.*/
|
|
||||||
REGION_ALIAS("PROCESS_STACK_RAM", ram0);
|
|
||||||
|
|
||||||
/* RAM region to be used for data segment.*/
|
|
||||||
REGION_ALIAS("DATA_RAM", ram0);
|
|
||||||
REGION_ALIAS("DATA_RAM_LMA", flash2);
|
|
||||||
|
|
||||||
/* RAM region to be used for BSS segment.*/
|
|
||||||
REGION_ALIAS("BSS_RAM", ram0);
|
|
||||||
|
|
||||||
/* RAM region to be used for the default heap.*/
|
|
||||||
REGION_ALIAS("HEAP_RAM", ram0);
|
|
||||||
|
|
||||||
/* Generic rules inclusion.*/
|
|
||||||
INCLUDE rules.ld
|
|
||||||
|
|||||||
@ -1,86 +1,13 @@
|
|||||||
/*
|
/*
|
||||||
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
|
* Copyright 2006..2018 Giovanni Di Sirio
|
||||||
|
* Copyright 2022 QMK contributors
|
||||||
Licensed under the Apache License, Version 2.0 (the "License");
|
* SPDX-License-Identifier: GPL-2.0-or-later
|
||||||
you may not use this file except in compliance with the License.
|
|
||||||
You may obtain a copy of the License at
|
|
||||||
|
|
||||||
http://www.apache.org/licenses/LICENSE-2.0
|
|
||||||
|
|
||||||
Unless required by applicable law or agreed to in writing, software
|
|
||||||
distributed under the License is distributed on an "AS IS" BASIS,
|
|
||||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
|
||||||
See the License for the specific language governing permissions and
|
|
||||||
limitations under the License.
|
|
||||||
*/
|
|
||||||
|
|
||||||
/*
|
|
||||||
* ST32F446xE memory setup.
|
|
||||||
* Note: Use of ram1 and ram2 is mutually exclusive with use of ram0.
|
|
||||||
*/
|
*/
|
||||||
MEMORY
|
|
||||||
{
|
|
||||||
flash0 (rx) : org = 0x08000000 + 64k, len = 512k - 64k /* tinyuf2 bootloader requires app to be located at 64k offset for this MCU */
|
|
||||||
flash1 (rx) : org = 0x00000000, len = 0
|
|
||||||
flash2 (rx) : org = 0x00000000, len = 0
|
|
||||||
flash3 (rx) : org = 0x00000000, len = 0
|
|
||||||
flash4 (rx) : org = 0x00000000, len = 0
|
|
||||||
flash5 (rx) : org = 0x00000000, len = 0
|
|
||||||
flash6 (rx) : org = 0x00000000, len = 0
|
|
||||||
flash7 (rx) : org = 0x00000000, len = 0
|
|
||||||
ram0 (wx) : org = 0x20000000, len = 128k /* SRAM1 + SRAM2 */
|
|
||||||
ram1 (wx) : org = 0x20000000, len = 112k /* SRAM1 */
|
|
||||||
ram2 (wx) : org = 0x00000000, len = 16k /* SRAM2 */
|
|
||||||
ram3 (wx) : org = 0x00000000, len = 0
|
|
||||||
ram4 (wx) : org = 0x00000000, len = 0
|
|
||||||
ram5 (wx) : org = 0x00000000, len = 0
|
|
||||||
ram6 (wx) : org = 0x00000000, len = 0
|
|
||||||
ram7 (wx) : org = 0x00000000, len = 0
|
|
||||||
}
|
|
||||||
|
|
||||||
/* For each data/text section two region are defined, a virtual region
|
f4xx_flash_size = 512k;
|
||||||
and a load region (_LMA suffix).*/
|
f4xx_ram1_size = 112k;
|
||||||
|
f4xx_ram2_size = 16k;
|
||||||
|
f4xx_ram4_size = 0;
|
||||||
|
f4xx_ram5_size = 0;
|
||||||
|
|
||||||
/* Flash region to be used for exception vectors.*/
|
INCLUDE stm32f4xx_tinyuf2_common.ld
|
||||||
REGION_ALIAS("VECTORS_FLASH", flash0);
|
|
||||||
REGION_ALIAS("VECTORS_FLASH_LMA", flash0);
|
|
||||||
|
|
||||||
/* Flash region to be used for constructors and destructors.*/
|
|
||||||
REGION_ALIAS("XTORS_FLASH", flash2);
|
|
||||||
REGION_ALIAS("XTORS_FLASH_LMA", flash2);
|
|
||||||
|
|
||||||
/* Flash region to be used for code text.*/
|
|
||||||
REGION_ALIAS("TEXT_FLASH", flash2);
|
|
||||||
REGION_ALIAS("TEXT_FLASH_LMA", flash2);
|
|
||||||
|
|
||||||
/* Flash region to be used for read only data.*/
|
|
||||||
REGION_ALIAS("RODATA_FLASH", flash2);
|
|
||||||
REGION_ALIAS("RODATA_FLASH_LMA", flash2);
|
|
||||||
|
|
||||||
/* Flash region to be used for various.*/
|
|
||||||
REGION_ALIAS("VARIOUS_FLASH", flash2);
|
|
||||||
REGION_ALIAS("VARIOUS_FLASH_LMA", flash2);
|
|
||||||
|
|
||||||
/* Flash region to be used for RAM(n) initialization data.*/
|
|
||||||
REGION_ALIAS("RAM_INIT_FLASH_LMA", flash2);
|
|
||||||
|
|
||||||
/* RAM region to be used for Main stack. This stack accommodates the processing
|
|
||||||
of all exceptions and interrupts.*/
|
|
||||||
REGION_ALIAS("MAIN_STACK_RAM", ram0);
|
|
||||||
|
|
||||||
/* RAM region to be used for the process stack. This is the stack used by
|
|
||||||
the main() function.*/
|
|
||||||
REGION_ALIAS("PROCESS_STACK_RAM", ram0);
|
|
||||||
|
|
||||||
/* RAM region to be used for data segment.*/
|
|
||||||
REGION_ALIAS("DATA_RAM", ram0);
|
|
||||||
REGION_ALIAS("DATA_RAM_LMA", flash2);
|
|
||||||
|
|
||||||
/* RAM region to be used for BSS segment.*/
|
|
||||||
REGION_ALIAS("BSS_RAM", ram0);
|
|
||||||
|
|
||||||
/* RAM region to be used for the default heap.*/
|
|
||||||
REGION_ALIAS("HEAP_RAM", ram0);
|
|
||||||
|
|
||||||
/* Generic rules inclusion.*/
|
|
||||||
INCLUDE rules.ld
|
|
||||||
|
|||||||
@ -24,12 +24,12 @@ MEMORY
|
|||||||
flash5 (rx) : org = 0x00000000, len = 0
|
flash5 (rx) : org = 0x00000000, len = 0
|
||||||
flash6 (rx) : org = 0x00000000, len = 0
|
flash6 (rx) : org = 0x00000000, len = 0
|
||||||
flash7 (rx) : org = 0x00000000, len = 0
|
flash7 (rx) : org = 0x00000000, len = 0
|
||||||
ram0 (wx) : org = 0x20000000, len = f4xx_ram_size
|
ram0 (wx) : org = 0x20000000, len = f4xx_ram1_size + f4xx_ram2_size /* SRAM1 + SRAM2 */
|
||||||
ram1 (wx) : org = 0x00000000, len = 0
|
ram1 (wx) : org = 0x20000000, len = f4xx_ram1_size /* SRAM1 */
|
||||||
ram2 (wx) : org = 0x00000000, len = 0
|
ram2 (wx) : org = 0x2001C000, len = f4xx_ram2_size /* SRAM2 */
|
||||||
ram3 (wx) : org = 0x00000000, len = 0
|
ram3 (wx) : org = 0x00000000, len = 0
|
||||||
ram4 (wx) : org = 0x00000000, len = 0
|
ram4 (wx) : org = 0x10000000, len = f4xx_ram4_size /* CCM SRAM */
|
||||||
ram5 (wx) : org = 0x00000000, len = 0
|
ram5 (wx) : org = 0x40024000, len = f4xx_ram5_size /* BCKP SRAM */
|
||||||
ram6 (wx) : org = 0x00000000, len = 0
|
ram6 (wx) : org = 0x00000000, len = 0
|
||||||
ram7 (wx) : org = 0x00000000, len = 0
|
ram7 (wx) : org = 0x00000000, len = 0
|
||||||
}
|
}
|
||||||
@ -80,4 +80,3 @@ REGION_ALIAS("HEAP_RAM", ram0);
|
|||||||
|
|
||||||
/* Generic rules inclusion.*/
|
/* Generic rules inclusion.*/
|
||||||
INCLUDE rules.ld
|
INCLUDE rules.ld
|
||||||
|
|
||||||
|
|||||||
@ -27,12 +27,12 @@ MEMORY
|
|||||||
flash5 (rx) : org = 0x00000000, len = 0
|
flash5 (rx) : org = 0x00000000, len = 0
|
||||||
flash6 (rx) : org = 0x00000000, len = 0
|
flash6 (rx) : org = 0x00000000, len = 0
|
||||||
flash7 (rx) : org = 0x00000000, len = 0
|
flash7 (rx) : org = 0x00000000, len = 0
|
||||||
ram0 (wx) : org = 0x20000000, len = f4xx_ram_size
|
ram0 (wx) : org = 0x20000000, len = f4xx_ram1_size + f4xx_ram2_size /* SRAM1 + SRAM2 */
|
||||||
ram1 (wx) : org = 0x00000000, len = 0
|
ram1 (wx) : org = 0x20000000, len = f4xx_ram1_size /* SRAM1 */
|
||||||
ram2 (wx) : org = 0x00000000, len = 0
|
ram2 (wx) : org = 0x2001C000, len = f4xx_ram2_size /* SRAM2 */
|
||||||
ram3 (wx) : org = 0x00000000, len = 0
|
ram3 (wx) : org = 0x00000000, len = 0
|
||||||
ram4 (wx) : org = 0x00000000, len = 0
|
ram4 (wx) : org = 0x10000000, len = f4xx_ram4_size /* CCM SRAM */
|
||||||
ram5 (wx) : org = 0x00000000, len = 0
|
ram5 (wx) : org = 0x40024000, len = f4xx_ram5_size /* BCKP SRAM */
|
||||||
ram6 (wx) : org = 0x00000000, len = 0
|
ram6 (wx) : org = 0x00000000, len = 0
|
||||||
ram7 (wx) : org = 0x00000000, len = 0
|
ram7 (wx) : org = 0x00000000, len = 0
|
||||||
}
|
}
|
||||||
@ -86,5 +86,3 @@ INCLUDE rules.ld
|
|||||||
|
|
||||||
/* TinyUF2 bootloader reset support */
|
/* TinyUF2 bootloader reset support */
|
||||||
_board_dfu_dbl_tap = ORIGIN(ram0) + 64k - 4; /* this is based off the linker file for tinyuf2 */
|
_board_dfu_dbl_tap = ORIGIN(ram0) + 64k - 4; /* this is based off the linker file for tinyuf2 */
|
||||||
|
|
||||||
|
|
||||||
|
|||||||
Loading…
Reference in New Issue
Block a user