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Fix SoftUART.c not compiling due to accidental check in of changes not yet complete in the rest of the XPLAINBridge project code.

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This commit is contained in:
Dean Camera 2010-10-13 14:23:23 +00:00
parent 3661ae8dfb
commit 31daf04c6a
2 changed files with 11 additions and 7 deletions
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12
LUFA/Drivers/Peripheral/AVRU4U6U7/ADC.h
View File

@ -81,19 +81,23 @@
#define ADC_REFERENCE_INT2560MV ((1 << REFS1) | (1 << REFS0)) #define ADC_REFERENCE_INT2560MV ((1 << REFS1) | (1 << REFS0))
/** Left-adjusts the 10-bit ADC result, so that the upper 8 bits of the value returned by the /** Left-adjusts the 10-bit ADC result, so that the upper 8 bits of the value returned by the
* ADC_GetResult() macro contain the 8 most significant bits of the result. */ * ADC_GetResult() macro contain the 8 most significant bits of the result.
*/
#define ADC_LEFT_ADJUSTED (1 << ADLAR) #define ADC_LEFT_ADJUSTED (1 << ADLAR)
/** Right-adjusts the 10-bit ADC result, so that the lower 8 bits of the value returned by the /** Right-adjusts the 10-bit ADC result, so that the lower 8 bits of the value returned by the
* ADC_GetResult() macro contain the 8 least significant bits of the result. */ * ADC_GetResult() macro contain the 8 least significant bits of the result.
*/
#define ADC_RIGHT_ADJUSTED (0 << ADLAR) #define ADC_RIGHT_ADJUSTED (0 << ADLAR)
/** Sets the ADC mode to free running, so that conversions take place continuously as fast as the ADC /** Sets the ADC mode to free running, so that conversions take place continuously as fast as the ADC
* is capable of at the given input clock speed. */ * is capable of at the given input clock speed.
*/
#define ADC_FREE_RUNNING (1 << ADATE) #define ADC_FREE_RUNNING (1 << ADATE)
/** Sets the ADC mode to single conversion, so that only a single conversion will take place before /** Sets the ADC mode to single conversion, so that only a single conversion will take place before
* the ADC returns to idle. */ * the ADC returns to idle.
*/
#define ADC_SINGLE_CONVERSION (0 << ADATE) #define ADC_SINGLE_CONVERSION (0 << ADATE)
/** Sets the ADC input clock to prescale by a factor of 2 the AVR's system clock. */ /** Sets the ADC input clock to prescale by a factor of 2 the AVR's system clock. */

6
Projects/XPLAINBridge/Lib/SoftUART.c
View File

@ -120,7 +120,7 @@ ISR(TIMER1_CAPT_vect, ISR_BLOCK)
/* Reception complete, store the received byte if stop bit valid */ /* Reception complete, store the received byte if stop bit valid */
if (SRX_Cached) if (SRX_Cached)
RingBuffer_Insert(&XMEGAtoUSB_Buffer, RX_Data); RingBuffer_Insert(&UARTtoUSB_Buffer, RX_Data);
} }
} }
@ -140,13 +140,13 @@ ISR(TIMER3_CAPT_vect, ISR_BLOCK)
TX_Data >>= 1; TX_Data >>= 1;
TX_BitsRemaining--; TX_BitsRemaining--;
} }
else if (!(RX_BitsRemaining) && !(RingBuffer_IsEmpty(&USBtoXMEGA_Buffer))) else if (!(RX_BitsRemaining) && !(RingBuffer_IsEmpty(&USBtoUART_Buffer)))
{ {
/* Start bit - TX line low */ /* Start bit - TX line low */
STXPORT &= ~(1 << STX); STXPORT &= ~(1 << STX);
/* Transmission complete, get the next byte to send (if available) */ /* Transmission complete, get the next byte to send (if available) */
TX_Data = ~RingBuffer_Remove(&USBtoXMEGA_Buffer); TX_Data = ~RingBuffer_Remove(&USBtoUART_Buffer);
TX_BitsRemaining = 9; TX_BitsRemaining = 9;
} }
} }