gitbot/qmk_firmware
0
0
Fork 0
mirror of https://github.com/qmk/qmk_firmware.git synced 2025-07-15 20:31:27 +00:00
Code Issues Packages Projects Releases Wiki Activity

Initial Ducky One 2 Mini keyboard and keymap

Browse Source
This commit is contained in:
GitWellBack 2019-05-02 19:48:18 +10:00 committed by Reza Jelveh
parent 6e132884b3
commit 2cd1d0b590
16 changed files with 2893 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

69
keyboards/ducky/one2mini/boards/NUC123SD4AN0/board.c Normal file
View File

@ -0,0 +1,69 @@
/*
ChibiOS Driver element - Copyright (C) 2019 /u/KeepItUnder
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#include "hal.h"
#if HAL_USE_PAL || defined(__DOXYGEN__)
/**
* @brief PAL setup.
* @details Digital I/O ports static configuration as defined in @p board.h.
* This variable is used by the HAL when initializing the PAL driver.
*/
const PALConfig pal_default_config = {
#if NUC123_HAS_GPIOA
{VAL_GPIOA_PMD, VAL_GPIOA_OFFD, VAL_GPIOA_DMASK, VAL_GPIOA_DBEN,
VAL_GPIOA_IMD, VAL_GPIOA_IEN, VAL_GPIOA_ISRC, VAL_GPIOA_DOUT},
#endif
#if NUC123_HAS_GPIOB
{VAL_GPIOB_PMD, VAL_GPIOB_OFFD, VAL_GPIOB_DMASK, VAL_GPIOB_DBEN,
VAL_GPIOB_IMD, VAL_GPIOB_IEN, VAL_GPIOB_ISRC, VAL_GPIOB_DOUT},
#endif
#if NUC123_HAS_GPIOC
{VAL_GPIOC_PMD, VAL_GPIOC_OFFD, VAL_GPIOC_DMASK, VAL_GPIOC_DBEN,
VAL_GPIOC_IMD, VAL_GPIOC_IEN, VAL_GPIOC_ISRC, VAL_GPIOC_DOUT},
#endif
#if NUC123_HAS_GPIOD
{VAL_GPIOD_PMD, VAL_GPIOD_OFFD, VAL_GPIOD_DMASK, VAL_GPIOD_DBEN,
VAL_GPIOD_IMD, VAL_GPIOD_IEN, VAL_GPIOD_ISRC, VAL_GPIOD_DOUT},
#endif
#if NUC123_HAS_GPIOF
{VAL_GPIOF_PMD, VAL_GPIOF_OFFD, VAL_GPIOF_DMASK, VAL_GPIOF_DBEN,
VAL_GPIOF_IMD, VAL_GPIOF_IEN, VAL_GPIOF_ISRC, VAL_GPIOF_DOUT},
#endif
};
#endif
void enter_bootloader_mode_if_requested(void);
/**
* @brief Early initialization code.
* @details This initialization must be performed just after stack setup
* and before any other initialization.
*/
void __early_init(void) {
//enter_bootloader_mode_if_requested();
NUC123_clock_init();
}
/**
* @brief Board-specific initialization code.
* @todo Add your board-specific code, if any.
*/
void boardInit(void) {
}

961
keyboards/ducky/one2mini/boards/NUC123SD4AN0/board.h Normal file
View File

@ -0,0 +1,961 @@
/*
ChibiOS Driver element - Copyright (C) 2019 /u/KeepItUnder
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#ifndef BOARD_H
#define BOARD_H
/*
* Setup for Generic NUC123 board.
*/
/*
* Board identifier.
*/
#define BOARD_NUC123SD4AN0
#define BOARD_NAME "Nuvoton NUC123SD4AN0 MCU"
/*
* Board oscillators-related settings.
* NOTE: LSE not fitted.
* NOTE: HSE is fitted.
*/
#if !defined(NUC123_LSECLK)
#define NUC123_LSECLK 0U
#endif
#define NUC123_LSEDRV (3U << 3U)
#if !defined(NUC123_HSECLK)
#define NUC123_HSECLK 12000000U
#endif
//#define NUC123_HSE_BYPASS
/*
* MCU type as defined in the NUC123 header.
*/
#define NUC123SD4AN0
/*
* GPIO Multi Function Pin USB Setup
* Requires Some GPIO pins to be disabled/set to USB
*/
/*
* IO pins assignments.
*/
#define GPIOA_PIN0 0U
#define GPIOA_PIN1 1U
#define GPIOA_PIN2 2U
#define GPIOA_PIN3 3U
#define GPIOA_PIN4 4U
#define GPIOA_PIN5 5U
#define GPIOA_PIN6 6U
#define GPIOA_PIN7 7U
#define GPIOA_PIN8 8U
#define GPIOA_PIN9 9U
#define GPIOA_SPI1_MISO0 10U
#define GPIOA_SPI1_CLK 11U
#define GPIOA_PWM0 12U
#define GPIOA_PWM1 13U
#define GPIOA_PWM2 14U
#define GPIOA_PWM3 15U
#define GPIOB_UART0_RXD 0U
#define GPIOB_UART0_TXD 1U
#define GPIOB_UART0_RTS 2U
#define GPIOB_UART0_CTS 3U
#define GPIOB_UART1_RXD 4U
#define GPIOB_UART1_TXD 5U
#define GPIOB_UART1_RTS 6U
#define GPIOB_UART1_CTS 7U
#define GPIOB_TM0 8U
#define GPIOB_TM1 9U
#define GPIOB_TM2 10U
#define GPIOB_PIN11 11U
#define GPIOB_CLK0 12U
#define GPIOB_PIN13 13U
#define GPIOB_INT0 14U
#define GPIOB_INT1 15U
#define GPIOC_PIN0 0U
#define GPIOC_PIN1 1U
#define GPIOC_PIN2 2U
#define GPIOC_PIN3 3U
#define GPIOC_PIN4 4U
#define GPIOC_PIN5 5U
#define GPIOC_PIN6 6U
#define GPIOC_PIN7 7U
#define GPIOC_PIN8 8U
#define GPIOC_PIN9 9U
#define GPIOC_PIN10 10U
#define GPIOC_PIN11 11U
#define GPIOC_PIN12 12U
#define GPIOC_PIN13 13U
#define GPIOC_PIN14 14U
#define GPIOC_PIN15 15U
#define GPIOD_ADC0 0U
#define GPIOD_ADC1 1U
#define GPIOD_ADC2 2U
#define GPIOD_ADC3 3U
#define GPIOD_ADC4 4U
#define GPIOD_ADC5 5U
#define GPIOD_PIN6 6U
#define GPIOD_PIN7 7U
#define GPIOD_PIN8 8U
#define GPIOD_PIN9 9U
#define GPIOD_PIN10 10U
#define GPIOD_PIN11 11U
#define GPIOD_PIN12 12U
#define GPIOD_PIN13 13U
#define GPIOD_PIN14 14U
#define GPIOD_PIN15 15U
#define GPIOE_PIN0 0U
#define GPIOE_PIN1 1U
#define GPIOE_PIN2 2U
#define GPIOE_PIN3 3U
#define GPIOE_PIN4 4U
#define GPIOE_PIN5 5U
#define GPIOE_PIN6 6U
#define GPIOE_PIN7 7U
#define GPIOE_PIN8 8U
#define GPIOE_PIN9 9U
#define GPIOE_PIN10 10U
#define GPIOE_PIN11 11U
#define GPIOE_PIN12 12U
#define GPIOE_PIN13 13U
#define GPIOE_PIN14 14U
#define GPIOE_PIN15 15U
#define GPIOF_OSC_OUT 0U
#define GPIOF_OSC_IN 1U
#define GPIOF_I2C0_SDA 2U
#define GPIOF_I2C0_SCL 3U
#define GPIOF_PIN4 4U
#define GPIOF_PIN5 5U
#define GPIOF_PIN6 6U
#define GPIOF_PIN7 7U
#define GPIOF_PIN8 8U
#define GPIOF_PIN9 9U
#define GPIOF_PIN10 10U
#define GPIOF_PIN11 11U
#define GPIOF_PIN12 12U
#define GPIOF_PIN13 13U
#define GPIOF_PIN14 14U
#define GPIOF_PIN15 15U
/*
* IO lines assignments.
*/
#define LINE_USB_DM PAL_LINE(GPIOA, 11U)
#define LINE_USB_DP PAL_LINE(GPIOA, 12U)
#define LINE_SWDIO PAL_LINE(GPIOA, 13U)
#define LINE_SWCLK PAL_LINE(GPIOA, 14U)
// #define LINE_SPI2_SCK PAL_LINE(GPIOB, 13U)
// #define LINE_SPI2_MISO PAL_LINE(GPIOB, 14U)
// #define LINE_SPI2_MOSI PAL_LINE(GPIOB, 15U)
#define LINE_OSC_IN PAL_LINE(GPIOF, 0U)
#define LINE_OSC_OUT PAL_LINE(GPIOF, 1U)
/*
* I/O ports initial setup, this configuration is established soon after reset
* in the initialization code.
* Please refer to the NUC123 Reference Manual for details.
*/
#define PIN_MODE_INPUT(n) (0U << ((n) * 2U))
#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U))
#define PIN_MODE_OPENDRAIN(n) (2U << ((n) * 2U))
#define PIN_MODE_QUASI(n) (3U << ((n) * 2U))
#define PIN_DIGITAL_EN(n) (0U << (n))
#define PIN_DIGITAL_DIS(n) (1U << (n))
#define PIN_DMASK_DIS(n) (0U << (n))
#define PIN_DMASK_EN(n) (1U << (n))
#define PIN_DBNCE_DIS(n) (0U << (n))
#define PIN_DBNCE_EN(n) (1U << (n))
#define PIN_IMD_EDGE(n) (0U << (n))
#define PIN_IMD_LVL(n) (1U << (n))
#define PIN_IEN_FELL_DIS(n) (0U << (n))
#define PIN_IEN_FELL_EN(n) (1U << (n))
#define PIN_IEN_REHL_DIS(n) ((0U << (n)) << 16)
#define PIN_IEN_REHL_EN(n) ((1U << (n)) << 16)
#define PIN_ISRC_EN(n) (1U << (n))
#define PIN_ISRC_DIS(n) (0U << (n))
#define PIN_ISRC_CLR(n) (1U << (n))
#define PIN_DATA_LOW(n) (0U << (n))
#define PIN_DATA_HIGH(n) (1U << (n))
/*
* GPIOA setup:
*
* PA0 - PIN0 (input pullup).
* PA1 - PIN1 (input pullup).
* PA2 - PIN2 (input pullup).
* PA3 - PIN3 (input pullup).
* PA4 - PIN4 (input pullup).
* PA5 - PIN5 (input pullup).
* PA6 - PIN6 (input pullup).
* PA7 - PIN7 (input pullup).
* PA8 - PIN8 (input pullup).
* PA9 - PIN9 (input pullup).
* PA10 - SPI1_MISO0 (input pullup).
* PA11 - SPI1_CLK (input floating).
* PA12 - PWM0 (input floating).
* PA13 - PWM1 (input pullup).
* PA14 - PWM2 (input pullup).
* PA15 - PWM3 (input pullup).
*/
#define VAL_GPIOA_PMD (PIN_MODE_INPUT(GPIOA_PIN0) | \
PIN_MODE_INPUT(GPIOA_PIN1) | \
PIN_MODE_INPUT(GPIOA_PIN2) | \
PIN_MODE_INPUT(GPIOA_PIN3) | \
PIN_MODE_INPUT(GPIOA_PIN4) | \
PIN_MODE_INPUT(GPIOA_PIN5) | \
PIN_MODE_INPUT(GPIOA_PIN6) | \
PIN_MODE_INPUT(GPIOA_PIN7) | \
PIN_MODE_INPUT(GPIOA_PIN8) | \
PIN_MODE_INPUT(GPIOA_PIN9) | \
PIN_MODE_INPUT(GPIOA_SPI1_MISO0) | \
PIN_MODE_INPUT(GPIOA_SPI1_CLK) | \
PIN_MODE_INPUT(GPIOA_PWM0) | \
PIN_MODE_INPUT(GPIOA_PWM1) | \
PIN_MODE_INPUT(GPIOA_PWM2) | \
PIN_MODE_INPUT(GPIOA_PWM3))
#define VAL_GPIOA_OFFD (PIN_DIGITAL_EN(GPIOA_PIN0) | \
PIN_DIGITAL_EN(GPIOA_PIN1) | \
PIN_DIGITAL_EN(GPIOA_PIN2) | \
PIN_DIGITAL_EN(GPIOA_PIN3) | \
PIN_DIGITAL_EN(GPIOA_PIN4) | \
PIN_DIGITAL_EN(GPIOA_PIN5) | \
PIN_DIGITAL_EN(GPIOA_PIN6) | \
PIN_DIGITAL_EN(GPIOA_PIN7) | \
PIN_DIGITAL_EN(GPIOA_PIN8) | \
PIN_DIGITAL_EN(GPIOA_PIN9) | \
PIN_DIGITAL_EN(GPIOA_SPI1_MISO0) | \
PIN_DIGITAL_EN(GPIOA_SPI1_CLK) | \
PIN_DIGITAL_EN(GPIOA_PWM0) | \
PIN_DIGITAL_EN(GPIOA_PWM1) | \
PIN_DIGITAL_EN(GPIOA_PWM2) | \
PIN_DIGITAL_EN(GPIOA_PWM3))
#define VAL_GPIOA_DMASK (PIN_DMASK_EN(GPIOA_PIN0) | \
PIN_DMASK_EN(GPIOA_PIN1) | \
PIN_DMASK_EN(GPIOA_PIN2) | \
PIN_DMASK_EN(GPIOA_PIN3) | \
PIN_DMASK_EN(GPIOA_PIN4) | \
PIN_DMASK_EN(GPIOA_PIN5) | \
PIN_DMASK_EN(GPIOA_PIN6) | \
PIN_DMASK_EN(GPIOA_PIN7) | \
PIN_DMASK_EN(GPIOA_PIN8) | \
PIN_DMASK_EN(GPIOA_PIN9) | \
PIN_DMASK_EN(GPIOA_SPI1_MISO0) | \
PIN_DMASK_EN(GPIOA_SPI1_CLK) | \
PIN_DMASK_EN(GPIOA_PWM0) | \
PIN_DMASK_EN(GPIOA_PWM1) | \
PIN_DMASK_EN(GPIOA_PWM2) | \
PIN_DMASK_EN(GPIOA_PWM3))
#define VAL_GPIOA_DBEN (PIN_DBNCE_EN(GPIOA_PIN0) | \
PIN_DBNCE_EN(GPIOA_PIN1) | \
PIN_DBNCE_EN(GPIOA_PIN2) | \
PIN_DBNCE_EN(GPIOA_PIN3) | \
PIN_DBNCE_EN(GPIOA_PIN4) | \
PIN_DBNCE_EN(GPIOA_PIN5) | \
PIN_DBNCE_EN(GPIOA_PIN6) | \
PIN_DBNCE_EN(GPIOA_PIN7) | \
PIN_DBNCE_EN(GPIOA_PIN8) | \
PIN_DBNCE_EN(GPIOA_PIN9) | \
PIN_DBNCE_EN(GPIOA_SPI1_MISO0) | \
PIN_DBNCE_EN(GPIOA_SPI1_CLK) | \
PIN_DBNCE_EN(GPIOA_PWM0) | \
PIN_DBNCE_EN(GPIOA_PWM1) | \
PIN_DBNCE_EN(GPIOA_PWM2) | \
PIN_DBNCE_EN(GPIOA_PWM3))
#define VAL_GPIOA_IMD (PIN_IMD_EDGE(GPIOA_PIN0) | \
PIN_IMD_EDGE(GPIOA_PIN1) | \
PIN_IMD_EDGE(GPIOA_PIN2) | \
PIN_IMD_EDGE(GPIOA_PIN3) | \
PIN_IMD_EDGE(GPIOA_PIN4) | \
PIN_IMD_EDGE(GPIOA_PIN5) | \
PIN_IMD_EDGE(GPIOA_PIN6) | \
PIN_IMD_EDGE(GPIOA_PIN7) | \
PIN_IMD_EDGE(GPIOA_PIN8) | \
PIN_IMD_EDGE(GPIOA_PIN9) | \
PIN_IMD_EDGE(GPIOA_SPI1_MISO0) | \
PIN_IMD_EDGE(GPIOA_SPI1_CLK) | \
PIN_IMD_EDGE(GPIOA_PWM0) | \
PIN_IMD_EDGE(GPIOA_PWM1) | \
PIN_IMD_EDGE(GPIOA_PWM2) | \
PIN_IMD_EDGE(GPIOA_PWM3))
#define VAL_GPIOA_IEN (PIN_IEN_FELL_DIS(GPIOA_PIN0) | \
PIN_IEN_FELL_DIS(GPIOA_PIN1) | \
PIN_IEN_FELL_DIS(GPIOA_PIN2) | \
PIN_IEN_FELL_DIS(GPIOA_PIN3) | \
PIN_IEN_FELL_DIS(GPIOA_PIN4) | \
PIN_IEN_FELL_DIS(GPIOA_PIN5) | \
PIN_IEN_FELL_DIS(GPIOA_PIN6) | \
PIN_IEN_FELL_DIS(GPIOA_PIN7) | \
PIN_IEN_FELL_DIS(GPIOA_PIN8) | \
PIN_IEN_FELL_DIS(GPIOA_PIN9) | \
PIN_IEN_FELL_DIS(GPIOA_SPI1_MISO0) | \
PIN_IEN_FELL_DIS(GPIOA_SPI1_CLK) | \
PIN_IEN_FELL_DIS(GPIOA_PWM0) | \
PIN_IEN_FELL_DIS(GPIOA_PWM1) | \
PIN_IEN_FELL_DIS(GPIOA_PWM2) | \
PIN_IEN_FELL_DIS(GPIOA_PWM3))
#define VAL_GPIOA_ISRC (PIN_ISRC_DIS(GPIOA_PIN0) | \
PIN_ISRC_DIS(GPIOA_PIN1) | \
PIN_ISRC_DIS(GPIOA_PIN2) | \
PIN_ISRC_DIS(GPIOA_PIN3) | \
PIN_ISRC_DIS(GPIOA_PIN4) | \
PIN_ISRC_DIS(GPIOA_PIN5) | \
PIN_ISRC_DIS(GPIOA_PIN6) | \
PIN_ISRC_DIS(GPIOA_PIN7) | \
PIN_ISRC_DIS(GPIOA_PIN8) | \
PIN_ISRC_DIS(GPIOA_PIN9) | \
PIN_ISRC_DIS(GPIOA_SPI1_MISO0) | \
PIN_ISRC_DIS(GPIOA_SPI1_CLK) | \
PIN_ISRC_DIS(GPIOA_PWM0) | \
PIN_ISRC_DIS(GPIOA_PWM1) | \
PIN_ISRC_DIS(GPIOA_PWM2) | \
PIN_ISRC_DIS(GPIOA_PWM3))
#define VAL_GPIOA_DOUT (PIN_DATA_LOW(GPIOA_PIN0) | \
PIN_DATA_LOW(GPIOA_PIN1) | \
PIN_DATA_LOW(GPIOA_PIN2) | \
PIN_DATA_LOW(GPIOA_PIN3) | \
PIN_DATA_LOW(GPIOA_PIN4) | \
PIN_DATA_LOW(GPIOA_PIN5) | \
PIN_DATA_LOW(GPIOA_PIN6) | \
PIN_DATA_LOW(GPIOA_PIN7) | \
PIN_DATA_LOW(GPIOA_PIN8) | \
PIN_DATA_LOW(GPIOA_PIN9) | \
PIN_DATA_LOW(GPIOA_SPI1_MISO0) | \
PIN_DATA_LOW(GPIOA_SPI1_CLK) | \
PIN_DATA_LOW(GPIOA_PWM0) | \
PIN_DATA_LOW(GPIOA_PWM1) | \
PIN_DATA_LOW(GPIOA_PWM2) | \
PIN_DATA_LOW(GPIOA_PWM3))
/*
* GPIOB setup:
*
* PB0 - UART0_RXD (input pullup).
* PB1 - UART0_TXD (output).
* PB2 - UART0_RTS (output).
* PB3 - UART0_CTS (output).
* PB4 - UART1_RXD (output).
* PB5 - UART1_TXD (output).
* PB6 - UART1_RTS (output).
* PB7 - UART1_CTS (output).
* PB8 - TM0 (input pullup).
* PB9 - TM1 (input pullup).
* PB10 - TM2 (input pullup).
* PB11 - PIN11 (input pullup).
* PB12 - CLK0 (output).
* PB13 - PIN13 (output).
* PB14 - INT0 (debug output).
* PB15 - INT1 (input pullup).
*/
#define VAL_GPIOB_PMD (PIN_MODE_INPUT(GPIOB_UART0_RXD) | \
PIN_MODE_OUTPUT(GPIOB_UART0_TXD) | \
PIN_MODE_OUTPUT(GPIOB_UART0_RTS) | \
PIN_MODE_OUTPUT(GPIOB_UART0_CTS) | \
PIN_MODE_OUTPUT(GPIOB_UART1_RXD) | \
PIN_MODE_OUTPUT(GPIOB_UART1_TXD) | \
PIN_MODE_OUTPUT(GPIOB_UART1_RTS) | \
PIN_MODE_OUTPUT(GPIOB_UART1_CTS) | \
PIN_MODE_OUTPUT(GPIOB_TM0) | \
PIN_MODE_INPUT(GPIOB_TM1) | \
PIN_MODE_INPUT(GPIOB_TM2) | \
PIN_MODE_INPUT(GPIOB_PIN11) | \
PIN_MODE_OUTPUT(GPIOB_CLK0) | \
PIN_MODE_OUTPUT(GPIOB_PIN13) | \
PIN_MODE_OUTPUT(GPIOB_INT0) | \
PIN_MODE_INPUT(GPIOB_INT1))
#define VAL_GPIOB_OFFD (PIN_DIGITAL_EN(GPIOB_UART0_RXD) | \
PIN_DIGITAL_DIS(GPIOB_UART0_TXD) | \
PIN_DIGITAL_DIS(GPIOB_UART0_RTS) | \
PIN_DIGITAL_DIS(GPIOB_UART0_CTS) | \
PIN_DIGITAL_DIS(GPIOB_UART1_RXD) | \
PIN_DIGITAL_DIS(GPIOB_UART1_TXD) | \
PIN_DIGITAL_DIS(GPIOB_UART1_RTS) | \
PIN_DIGITAL_DIS(GPIOB_UART1_CTS) | \
PIN_DIGITAL_DIS(GPIOB_TM0) | \
PIN_DIGITAL_EN(GPIOB_TM1) | \
PIN_DIGITAL_EN(GPIOB_TM2) | \
PIN_DIGITAL_EN(GPIOB_PIN11) | \
PIN_DIGITAL_DIS(GPIOB_CLK0) | \
PIN_DIGITAL_DIS(GPIOB_PIN13) | \
PIN_DIGITAL_DIS(GPIOB_INT0) | \
PIN_DIGITAL_EN(GPIOB_INT1))
#define VAL_GPIOB_DMASK (PIN_DMASK_EN(GPIOB_UART0_RXD) | \
PIN_DMASK_DIS(GPIOB_UART0_TXD) | \
PIN_DMASK_DIS(GPIOB_UART0_RTS) | \
PIN_DMASK_DIS(GPIOB_UART0_CTS) | \
PIN_DMASK_DIS(GPIOB_UART1_RXD) | \
PIN_DMASK_DIS(GPIOB_UART1_TXD) | \
PIN_DMASK_DIS(GPIOB_UART1_RTS) | \
PIN_DMASK_DIS(GPIOB_UART1_CTS) | \
PIN_DMASK_DIS(GPIOB_TM0) | \
PIN_DMASK_EN(GPIOB_TM1) | \
PIN_DMASK_EN(GPIOB_TM2) | \
PIN_DMASK_EN(GPIOB_PIN11) | \
PIN_DMASK_DIS(GPIOB_CLK0) | \
PIN_DMASK_DIS(GPIOB_PIN13) | \
PIN_DMASK_DIS(GPIOB_INT0) | \
PIN_DMASK_EN(GPIOB_INT1))
#define VAL_GPIOB_DBEN (PIN_DBNCE_EN(GPIOB_UART0_RXD) | \
PIN_DBNCE_DIS(GPIOB_UART0_TXD) | \
PIN_DBNCE_DIS(GPIOB_UART0_RTS) | \
PIN_DBNCE_DIS(GPIOB_UART0_CTS) | \
PIN_DBNCE_DIS(GPIOB_UART1_RXD) | \
PIN_DBNCE_DIS(GPIOB_UART1_TXD) | \
PIN_DBNCE_DIS(GPIOB_UART1_RTS) | \
PIN_DBNCE_DIS(GPIOB_UART1_CTS) | \
PIN_DBNCE_DIS(GPIOB_TM0) | \
PIN_DBNCE_EN(GPIOB_TM1) | \
PIN_DBNCE_EN(GPIOB_TM2) | \
PIN_DBNCE_EN(GPIOB_PIN11) | \
PIN_DBNCE_DIS(GPIOB_CLK0) | \
PIN_DBNCE_DIS(GPIOB_PIN13) | \
PIN_DBNCE_EN(GPIOB_INT0) | \
PIN_DBNCE_EN(GPIOB_INT1))
#define VAL_GPIOB_IMD (PIN_IMD_EDGE(GPIOB_UART0_RXD) | \
PIN_IMD_EDGE(GPIOB_UART0_TXD) | \
PIN_IMD_EDGE(GPIOB_UART0_RTS) | \
PIN_IMD_EDGE(GPIOB_UART0_CTS) | \
PIN_IMD_EDGE(GPIOB_UART1_RXD) | \
PIN_IMD_EDGE(GPIOB_UART1_TXD) | \
PIN_IMD_EDGE(GPIOB_UART1_RTS) | \
PIN_IMD_EDGE(GPIOB_UART1_CTS) | \
PIN_IMD_EDGE(GPIOB_TM0) | \
PIN_IMD_EDGE(GPIOB_TM1) | \
PIN_IMD_EDGE(GPIOB_TM2) | \
PIN_IMD_EDGE(GPIOB_PIN11) | \
PIN_IMD_EDGE(GPIOB_CLK0) | \
PIN_IMD_EDGE(GPIOB_PIN13) | \
PIN_IMD_EDGE(GPIOB_INT0) | \
PIN_IMD_EDGE(GPIOB_INT1))
#define VAL_GPIOB_IEN (PIN_IEN_FELL_DIS(GPIOB_UART0_RXD) | \
PIN_IEN_FELL_DIS(GPIOB_UART0_TXD) | \
PIN_IEN_FELL_DIS(GPIOB_UART0_RTS) | \
PIN_IEN_FELL_DIS(GPIOB_UART0_CTS) | \
PIN_IEN_FELL_DIS(GPIOB_UART1_RXD) | \
PIN_IEN_FELL_DIS(GPIOB_UART1_TXD) | \
PIN_IEN_FELL_DIS(GPIOB_UART1_RTS) | \
PIN_IEN_FELL_DIS(GPIOB_UART1_CTS) | \
PIN_IEN_FELL_DIS(GPIOB_TM0) | \
PIN_IEN_FELL_DIS(GPIOB_TM1) | \
PIN_IEN_FELL_DIS(GPIOB_TM2) | \
PIN_IEN_FELL_DIS(GPIOB_PIN11) | \
PIN_IEN_FELL_DIS(GPIOB_CLK0) | \
PIN_IEN_FELL_DIS(GPIOB_PIN13) | \
PIN_IEN_FELL_DIS(GPIOB_INT0) | \
PIN_IEN_FELL_DIS(GPIOB_INT1))
#define VAL_GPIOB_ISRC (PIN_ISRC_DIS(GPIOB_UART0_RXD) | \
PIN_ISRC_DIS(GPIOB_UART0_TXD) | \
PIN_ISRC_DIS(GPIOB_UART0_RTS) | \
PIN_ISRC_DIS(GPIOB_UART0_CTS) | \
PIN_ISRC_DIS(GPIOB_UART1_RXD) | \
PIN_ISRC_DIS(GPIOB_UART1_TXD) | \
PIN_ISRC_DIS(GPIOB_UART1_RTS) | \
PIN_ISRC_DIS(GPIOB_UART1_CTS) | \
PIN_ISRC_DIS(GPIOB_TM0) | \
PIN_ISRC_DIS(GPIOB_TM1) | \
PIN_ISRC_DIS(GPIOB_TM2) | \
PIN_ISRC_DIS(GPIOB_PIN11) | \
PIN_ISRC_DIS(GPIOB_CLK0) | \
PIN_ISRC_DIS(GPIOB_PIN13) | \
PIN_ISRC_DIS(GPIOB_INT0) | \
PIN_ISRC_DIS(GPIOB_INT1))
#define VAL_GPIOB_DOUT (PIN_DATA_LOW(GPIOB_UART0_RXD) | \
PIN_DATA_LOW(GPIOB_UART0_TXD) | \
PIN_DATA_LOW(GPIOB_UART0_RTS) | \
PIN_DATA_LOW(GPIOB_UART0_CTS) | \
PIN_DATA_LOW(GPIOB_UART1_RXD) | \
PIN_DATA_LOW(GPIOB_UART1_TXD) | \
PIN_DATA_LOW(GPIOB_UART1_RTS) | \
PIN_DATA_LOW(GPIOB_UART1_CTS) | \
PIN_DATA_LOW(GPIOB_TM0) | \
PIN_DATA_LOW(GPIOB_TM1) | \
PIN_DATA_LOW(GPIOB_TM2) | \
PIN_DATA_LOW(GPIOB_PIN11) | \
PIN_DATA_LOW(GPIOB_CLK0) | \
PIN_DATA_LOW(GPIOB_PIN13) | \
PIN_DATA_LOW(GPIOB_INT0) | \
PIN_DATA_LOW(GPIOB_INT1))
/*
* GPIOC setup:
*
* PC0 - PIN0 (input pullup).
* PC1 - PIN1 (input pullup).
* PC2 - PIN2 (input pullup).
* PC3 - PIN3 (input pullup).
* PC4 - PIN4 (output).
* PC5 - PIN5 (output).
* PC6 - PIN6 (input pullup).
* PC7 - PIN7 (input pullup).
* PC8 - PIN8 (input pullup).
* PC9 - PIN9 (input pullup).
* PC10 - PIN10 (input pullup).
* PC11 - PIN11 (input pullup).
* PC12 - PIN12 (input pullup).
* PC13 - PIN13 (input pullup).
* PC14 - PIN14 (input pullup).
* PC15 - PIN15 (input pullup).
*/
#define VAL_GPIOC_PMD (PIN_MODE_INPUT(GPIOC_PIN0) | \
PIN_MODE_INPUT(GPIOC_PIN1) | \
PIN_MODE_INPUT(GPIOC_PIN2) | \
PIN_MODE_INPUT(GPIOC_PIN3) | \
PIN_MODE_OUTPUT(GPIOC_PIN4) | \
PIN_MODE_OUTPUT(GPIOC_PIN5) | \
PIN_MODE_INPUT(GPIOC_PIN6) | \
PIN_MODE_INPUT(GPIOC_PIN7) | \
PIN_MODE_INPUT(GPIOC_PIN8) | \
PIN_MODE_INPUT(GPIOC_PIN9) | \
PIN_MODE_INPUT(GPIOC_PIN10) | \
PIN_MODE_INPUT(GPIOC_PIN11) | \
PIN_MODE_INPUT(GPIOC_PIN12) | \
PIN_MODE_INPUT(GPIOC_PIN13) | \
PIN_MODE_INPUT(GPIOC_PIN14) | \
PIN_MODE_INPUT(GPIOC_PIN15))
#define VAL_GPIOC_OFFD (PIN_DIGITAL_EN(GPIOC_PIN0) | \
PIN_DIGITAL_EN(GPIOC_PIN1) | \
PIN_DIGITAL_EN(GPIOC_PIN2) | \
PIN_DIGITAL_EN(GPIOC_PIN3) | \
PIN_DIGITAL_DIS(GPIOC_PIN4) | \
PIN_DIGITAL_DIS(GPIOC_PIN5) | \
PIN_DIGITAL_EN(GPIOC_PIN6) | \
PIN_DIGITAL_EN(GPIOC_PIN7) | \
PIN_DIGITAL_EN(GPIOC_PIN8) | \
PIN_DIGITAL_EN(GPIOC_PIN9) | \
PIN_DIGITAL_EN(GPIOC_PIN10) | \
PIN_DIGITAL_EN(GPIOC_PIN11) | \
PIN_DIGITAL_EN(GPIOC_PIN12) | \
PIN_DIGITAL_EN(GPIOC_PIN13) | \
PIN_DIGITAL_EN(GPIOC_PIN14) | \
PIN_DIGITAL_EN(GPIOC_PIN15))
#define VAL_GPIOC_DMASK (PIN_DMASK_EN(GPIOC_PIN0) | \
PIN_DMASK_EN(GPIOC_PIN1) | \
PIN_DMASK_EN(GPIOC_PIN2) | \
PIN_DMASK_EN(GPIOC_PIN3) | \
PIN_DMASK_DIS(GPIOC_PIN4) | \
PIN_DMASK_DIS(GPIOC_PIN5) | \
PIN_DMASK_EN(GPIOC_PIN6) | \
PIN_DMASK_EN(GPIOC_PIN7) | \
PIN_DMASK_EN(GPIOC_PIN8) | \
PIN_DMASK_EN(GPIOC_PIN9) | \
PIN_DMASK_EN(GPIOC_PIN10) | \
PIN_DMASK_EN(GPIOC_PIN11) | \
PIN_DMASK_EN(GPIOC_PIN12) | \
PIN_DMASK_EN(GPIOC_PIN13) | \
PIN_DMASK_EN(GPIOC_PIN14) | \
PIN_DMASK_EN(GPIOC_PIN15))
#define VAL_GPIOC_DBEN (PIN_DBNCE_EN(GPIOC_PIN0) | \
PIN_DBNCE_EN(GPIOC_PIN1) | \
PIN_DBNCE_EN(GPIOC_PIN2) | \
PIN_DBNCE_EN(GPIOC_PIN3) | \
PIN_DBNCE_DIS(GPIOC_PIN4) | \
PIN_DBNCE_DIS(GPIOC_PIN5) | \
PIN_DBNCE_EN(GPIOC_PIN6) | \
PIN_DBNCE_EN(GPIOC_PIN7) | \
PIN_DBNCE_EN(GPIOC_PIN8) | \
PIN_DBNCE_EN(GPIOC_PIN9) | \
PIN_DBNCE_EN(GPIOC_PIN10) | \
PIN_DBNCE_EN(GPIOC_PIN11) | \
PIN_DBNCE_EN(GPIOC_PIN12) | \
PIN_DBNCE_EN(GPIOC_PIN13) | \
PIN_DBNCE_EN(GPIOC_PIN14) | \
PIN_DBNCE_EN(GPIOC_PIN15))
#define VAL_GPIOC_IMD (PIN_IMD_EDGE(GPIOC_PIN0) | \
PIN_IMD_EDGE(GPIOC_PIN1) | \
PIN_IMD_EDGE(GPIOC_PIN2) | \
PIN_IMD_EDGE(GPIOC_PIN3) | \
PIN_IMD_EDGE(GPIOC_PIN4) | \
PIN_IMD_EDGE(GPIOC_PIN5) | \
PIN_IMD_EDGE(GPIOC_PIN6) | \
PIN_IMD_EDGE(GPIOC_PIN7) | \
PIN_IMD_EDGE(GPIOC_PIN8) | \
PIN_IMD_EDGE(GPIOC_PIN9) | \
PIN_IMD_EDGE(GPIOC_PIN10) | \
PIN_IMD_EDGE(GPIOC_PIN11) | \
PIN_IMD_EDGE(GPIOC_PIN12) | \
PIN_IMD_EDGE(GPIOC_PIN13) | \
PIN_IMD_EDGE(GPIOC_PIN14) | \
PIN_IMD_EDGE(GPIOC_PIN15))
#define VAL_GPIOC_IEN (PIN_IEN_FELL_DIS(GPIOC_PIN0) | \
PIN_IEN_FELL_DIS(GPIOC_PIN1) | \
PIN_IEN_FELL_DIS(GPIOC_PIN2) | \
PIN_IEN_FELL_DIS(GPIOC_PIN3) | \
PIN_IEN_FELL_DIS(GPIOC_PIN4) | \
PIN_IEN_FELL_DIS(GPIOC_PIN5) | \
PIN_IEN_FELL_DIS(GPIOC_PIN6) | \
PIN_IEN_FELL_DIS(GPIOC_PIN7) | \
PIN_IEN_FELL_DIS(GPIOC_PIN8) | \
PIN_IEN_FELL_DIS(GPIOC_PIN9) | \
PIN_IEN_FELL_DIS(GPIOC_PIN10) | \
PIN_IEN_FELL_DIS(GPIOC_PIN11) | \
PIN_IEN_FELL_DIS(GPIOC_PIN12) | \
PIN_IEN_FELL_DIS(GPIOC_PIN13) | \
PIN_IEN_FELL_DIS(GPIOC_PIN14) | \
PIN_IEN_FELL_DIS(GPIOC_PIN15))
#define VAL_GPIOC_ISRC (PIN_ISRC_DIS(GPIOC_PIN0) | \
PIN_ISRC_DIS(GPIOC_PIN1) | \
PIN_ISRC_DIS(GPIOC_PIN2) | \
PIN_ISRC_DIS(GPIOC_PIN3) | \
PIN_ISRC_DIS(GPIOC_PIN4) | \
PIN_ISRC_DIS(GPIOC_PIN5) | \
PIN_ISRC_DIS(GPIOC_PIN6) | \
PIN_ISRC_DIS(GPIOC_PIN7) | \
PIN_ISRC_DIS(GPIOC_PIN8) | \
PIN_ISRC_DIS(GPIOC_PIN9) | \
PIN_ISRC_DIS(GPIOC_PIN10) | \
PIN_ISRC_DIS(GPIOC_PIN11) | \
PIN_ISRC_DIS(GPIOC_PIN12) | \
PIN_ISRC_DIS(GPIOC_PIN13) | \
PIN_ISRC_DIS(GPIOC_PIN14) | \
PIN_ISRC_DIS(GPIOC_PIN15))
#define VAL_GPIOC_DOUT (PIN_DATA_LOW(GPIOC_PIN0) | \
PIN_DATA_LOW(GPIOC_PIN1) | \
PIN_DATA_LOW(GPIOC_PIN2) | \
PIN_DATA_LOW(GPIOC_PIN3) | \
PIN_DATA_LOW(GPIOC_PIN4) | \
PIN_DATA_LOW(GPIOC_PIN5) | \
PIN_DATA_LOW(GPIOC_PIN6) | \
PIN_DATA_LOW(GPIOC_PIN7) | \
PIN_DATA_LOW(GPIOC_PIN8) | \
PIN_DATA_LOW(GPIOC_PIN9) | \
PIN_DATA_LOW(GPIOC_PIN10) | \
PIN_DATA_LOW(GPIOC_PIN11) | \
PIN_DATA_LOW(GPIOC_PIN12) | \
PIN_DATA_LOW(GPIOC_PIN13) | \
PIN_DATA_LOW(GPIOC_PIN14) | \
PIN_DATA_LOW(GPIOC_PIN15))
/*
* GPIOD setup:
*
* PD0 - ADC0 (input pullup).
* PD1 - ADC1 (input pullup).
* PD2 - ADC2 (input pullup).
* PD3 - ADC3 (output).
* PD4 - ADC4 (output).
* PD5 - ADC5 (output).
* PD6 - PIN6 (input pullup).
* PD7 - PIN7 (input pullup).
* PD8 - PIN8 (input pullup).
* PD9 - PIN9 (output).
* PD10 - PIN10 (debug output).
* PD11 - PIN11 (output).
* PD12 - PIN12 (input pullup).
* PD13 - PIN13 (input pullup).
* PD14 - PIN14 (input pullup).
* PD15 - PIN15 (input pullup).
*/
#define VAL_GPIOD_PMD (PIN_MODE_INPUT(GPIOD_ADC0) | \
PIN_MODE_INPUT(GPIOD_ADC1) | \
PIN_MODE_INPUT(GPIOD_ADC2) | \
PIN_MODE_OUTPUT(GPIOD_ADC3) | \
PIN_MODE_OUTPUT(GPIOD_ADC4) | \
PIN_MODE_OUTPUT(GPIOD_ADC5) | \
PIN_MODE_INPUT(GPIOD_PIN6) | \
PIN_MODE_INPUT(GPIOD_PIN7) | \
PIN_MODE_INPUT(GPIOD_PIN8) | \
PIN_MODE_OUTPUT(GPIOD_PIN9) | \
PIN_MODE_OUTPUT(GPIOD_PIN10) | \
PIN_MODE_OUTPUT(GPIOD_PIN11) | \
PIN_MODE_INPUT(GPIOD_PIN12) | \
PIN_MODE_INPUT(GPIOD_PIN13) | \
PIN_MODE_INPUT(GPIOD_PIN14) | \
PIN_MODE_INPUT(GPIOD_PIN15))
#define VAL_GPIOD_OFFD (PIN_DIGITAL_EN(GPIOD_ADC0) | \
PIN_DIGITAL_EN(GPIOD_ADC1) | \
PIN_DIGITAL_EN(GPIOD_ADC2) | \
PIN_DIGITAL_DIS(GPIOD_ADC3) | \
PIN_DIGITAL_DIS(GPIOD_ADC4) | \
PIN_DIGITAL_DIS(GPIOD_ADC5) | \
PIN_DIGITAL_EN(GPIOD_PIN6) | \
PIN_DIGITAL_EN(GPIOD_PIN7) | \
PIN_DIGITAL_EN(GPIOD_PIN8) | \
PIN_DIGITAL_DIS(GPIOD_PIN9) | \
PIN_DIGITAL_DIS(GPIOD_PIN10) | \
PIN_DIGITAL_DIS(GPIOD_PIN11) | \
PIN_DIGITAL_EN(GPIOD_PIN12) | \
PIN_DIGITAL_EN(GPIOD_PIN13) | \
PIN_DIGITAL_EN(GPIOD_PIN14) | \
PIN_DIGITAL_EN(GPIOD_PIN15))
#define VAL_GPIOD_DMASK (PIN_DMASK_EN(GPIOD_ADC0) | \
PIN_DMASK_EN(GPIOD_ADC1) | \
PIN_DMASK_EN(GPIOD_ADC2) | \
PIN_DMASK_DIS(GPIOD_ADC3) | \
PIN_DMASK_DIS(GPIOD_ADC4) | \
PIN_DMASK_DIS(GPIOD_ADC5) | \
PIN_DMASK_EN(GPIOD_PIN6) | \
PIN_DMASK_EN(GPIOD_PIN7) | \
PIN_DMASK_EN(GPIOD_PIN8) | \
PIN_DMASK_DIS(GPIOD_PIN9) | \
PIN_DMASK_DIS(GPIOD_PIN10) | \
PIN_DMASK_DIS(GPIOD_PIN11) | \
PIN_DMASK_EN(GPIOD_PIN12) | \
PIN_DMASK_EN(GPIOD_PIN13) | \
PIN_DMASK_EN(GPIOD_PIN14) | \
PIN_DMASK_EN(GPIOD_PIN15))
#define VAL_GPIOD_DBEN (PIN_DBNCE_EN(GPIOD_ADC0) | \
PIN_DBNCE_EN(GPIOD_ADC1) | \
PIN_DBNCE_EN(GPIOD_ADC2) | \
PIN_DBNCE_DIS(GPIOD_ADC3) | \
PIN_DBNCE_DIS(GPIOD_ADC4) | \
PIN_DBNCE_DIS(GPIOD_ADC5) | \
PIN_DBNCE_EN(GPIOD_PIN6) | \
PIN_DBNCE_EN(GPIOD_PIN7) | \
PIN_DBNCE_EN(GPIOD_PIN8) | \
PIN_DBNCE_DIS(GPIOD_PIN9) | \
PIN_DBNCE_DIS(GPIOD_PIN10) | \
PIN_DBNCE_DIS(GPIOD_PIN11) | \
PIN_DBNCE_EN(GPIOD_PIN12) | \
PIN_DBNCE_EN(GPIOD_PIN13) | \
PIN_DBNCE_EN(GPIOD_PIN14) | \
PIN_DBNCE_EN(GPIOD_PIN15))
#define VAL_GPIOD_IMD (PIN_IMD_EDGE(GPIOD_ADC0) | \
PIN_IMD_EDGE(GPIOD_ADC1) | \
PIN_IMD_EDGE(GPIOD_ADC2) | \
PIN_IMD_EDGE(GPIOD_ADC3) | \
PIN_IMD_EDGE(GPIOD_ADC4) | \
PIN_IMD_EDGE(GPIOD_ADC5) | \
PIN_IMD_EDGE(GPIOD_PIN6) | \
PIN_IMD_EDGE(GPIOD_PIN7) | \
PIN_IMD_EDGE(GPIOD_PIN8) | \
PIN_IMD_EDGE(GPIOD_PIN9) | \
PIN_IMD_EDGE(GPIOD_PIN10) | \
PIN_IMD_EDGE(GPIOD_PIN11) | \
PIN_IMD_EDGE(GPIOD_PIN12) | \
PIN_IMD_EDGE(GPIOD_PIN13) | \
PIN_IMD_EDGE(GPIOD_PIN14) | \
PIN_IMD_EDGE(GPIOD_PIN15))
#define VAL_GPIOD_IEN (PIN_IEN_FELL_DIS(GPIOD_ADC0) | \
PIN_IEN_FELL_DIS(GPIOD_ADC1) | \
PIN_IEN_FELL_DIS(GPIOD_ADC2) | \
PIN_IEN_FELL_DIS(GPIOD_ADC3) | \
PIN_IEN_FELL_DIS(GPIOD_ADC4) | \
PIN_IEN_FELL_DIS(GPIOD_ADC5) | \
PIN_IEN_FELL_DIS(GPIOD_PIN6) | \
PIN_IEN_FELL_DIS(GPIOD_PIN7) | \
PIN_IEN_FELL_DIS(GPIOD_PIN8) | \
PIN_IEN_FELL_DIS(GPIOD_PIN9) | \
PIN_IEN_FELL_DIS(GPIOD_PIN10) | \
PIN_IEN_FELL_DIS(GPIOD_PIN11) | \
PIN_IEN_FELL_DIS(GPIOD_PIN12) | \
PIN_IEN_FELL_DIS(GPIOD_PIN13) | \
PIN_IEN_FELL_DIS(GPIOD_PIN14) | \
PIN_IEN_FELL_DIS(GPIOD_PIN15))
#define VAL_GPIOD_ISRC (PIN_ISRC_DIS(GPIOD_ADC0) | \
PIN_ISRC_DIS(GPIOD_ADC1) | \
PIN_ISRC_DIS(GPIOD_ADC2) | \
PIN_ISRC_DIS(GPIOD_ADC3) | \
PIN_ISRC_DIS(GPIOD_ADC4) | \
PIN_ISRC_DIS(GPIOD_ADC5) | \
PIN_ISRC_DIS(GPIOD_PIN6) | \
PIN_ISRC_DIS(GPIOD_PIN7) | \
PIN_ISRC_DIS(GPIOD_PIN8) | \
PIN_ISRC_DIS(GPIOD_PIN9) | \
PIN_ISRC_DIS(GPIOD_PIN10) | \
PIN_ISRC_DIS(GPIOD_PIN11) | \
PIN_ISRC_DIS(GPIOD_PIN12) | \
PIN_ISRC_DIS(GPIOD_PIN13) | \
PIN_ISRC_DIS(GPIOD_PIN14) | \
PIN_ISRC_DIS(GPIOD_PIN15))
#define VAL_GPIOD_DOUT (PIN_DATA_LOW(GPIOD_ADC0) | \
PIN_DATA_LOW(GPIOD_ADC1) | \
PIN_DATA_LOW(GPIOD_ADC2) | \
PIN_DATA_LOW(GPIOD_ADC3) | \
PIN_DATA_LOW(GPIOD_ADC4) | \
PIN_DATA_LOW(GPIOD_ADC5) | \
PIN_DATA_LOW(GPIOD_PIN6) | \
PIN_DATA_LOW(GPIOD_PIN7) | \
PIN_DATA_LOW(GPIOD_PIN8) | \
PIN_DATA_LOW(GPIOD_PIN9) | \
PIN_DATA_LOW(GPIOD_PIN10) | \
PIN_DATA_LOW(GPIOD_PIN11) | \
PIN_DATA_LOW(GPIOD_PIN12) | \
PIN_DATA_LOW(GPIOD_PIN13) | \
PIN_DATA_LOW(GPIOD_PIN14) | \
PIN_DATA_LOW(GPIOD_PIN15))
/*
* GPIOF setup:
*
* PF0 - OSC_IN (input floating).
* PF1 - OSC_OUT (input floating).
* PF2 - I2C0_SDA (input pullup).
* PF3 - I2C0_SCL (input pullup).
* PF4 - PIN4 (input pullup).
* PF5 - PIN5 (input pullup).
* PF6 - PIN6 (input pullup).
* PF7 - PIN7 (input pullup).
* PF8 - PIN8 (input pullup).
* PF9 - PIN9 (input pullup).
* PF10 - PIN10 (input pullup).
* PF11 - PIN11 (input pullup).
* PF12 - PIN12 (input pullup).
* PF13 - PIN13 (input pullup).
* PF14 - PIN14 (input pullup).
* PF15 - PIN15 (input pullup).
*/
#define VAL_GPIOF_PMD (PIN_MODE_QUASI(GPIOF_OSC_IN) | \
PIN_MODE_QUASI(GPIOF_OSC_OUT) | \
PIN_MODE_INPUT(GPIOF_I2C0_SDA) | \
PIN_MODE_INPUT(GPIOF_I2C0_SCL) | \
PIN_MODE_INPUT(GPIOF_PIN4) | \
PIN_MODE_INPUT(GPIOF_PIN5) | \
PIN_MODE_INPUT(GPIOF_PIN6) | \
PIN_MODE_INPUT(GPIOF_PIN7) | \
PIN_MODE_INPUT(GPIOF_PIN8) | \
PIN_MODE_INPUT(GPIOF_PIN9) | \
PIN_MODE_INPUT(GPIOF_PIN10) | \
PIN_MODE_INPUT(GPIOF_PIN11) | \
PIN_MODE_INPUT(GPIOF_PIN12) | \
PIN_MODE_INPUT(GPIOF_PIN13) | \
PIN_MODE_INPUT(GPIOF_PIN14) | \
PIN_MODE_INPUT(GPIOF_PIN15))
#define VAL_GPIOF_OFFD (PIN_DIGITAL_DIS(GPIOF_OSC_IN) | \
PIN_DIGITAL_DIS(GPIOF_OSC_OUT) | \
PIN_DIGITAL_EN(GPIOF_I2C0_SDA) | \
PIN_DIGITAL_EN(GPIOF_I2C0_SCL) | \
PIN_DIGITAL_EN(GPIOF_PIN4) | \
PIN_DIGITAL_EN(GPIOF_PIN5) | \
PIN_DIGITAL_EN(GPIOF_PIN6) | \
PIN_DIGITAL_EN(GPIOF_PIN7) | \
PIN_DIGITAL_EN(GPIOF_PIN8) | \
PIN_DIGITAL_EN(GPIOF_PIN9) | \
PIN_DIGITAL_EN(GPIOF_PIN10) | \
PIN_DIGITAL_EN(GPIOF_PIN11) | \
PIN_DIGITAL_EN(GPIOF_PIN12) | \
PIN_DIGITAL_EN(GPIOF_PIN13) | \
PIN_DIGITAL_EN(GPIOF_PIN14) | \
PIN_DIGITAL_EN(GPIOF_PIN15))
#define VAL_GPIOF_DMASK (PIN_DMASK_DIS(GPIOF_OSC_IN) | \
PIN_DMASK_DIS(GPIOF_OSC_OUT) | \
PIN_DMASK_EN(GPIOF_I2C0_SDA) | \
PIN_DMASK_EN(GPIOF_I2C0_SCL) | \
PIN_DMASK_EN(GPIOF_PIN4) | \
PIN_DMASK_EN(GPIOF_PIN5) | \
PIN_DMASK_EN(GPIOF_PIN6) | \
PIN_DMASK_EN(GPIOF_PIN7) | \
PIN_DMASK_EN(GPIOF_PIN8) | \
PIN_DMASK_EN(GPIOF_PIN9) | \
PIN_DMASK_EN(GPIOF_PIN10) | \
PIN_DMASK_EN(GPIOF_PIN11) | \
PIN_DMASK_EN(GPIOF_PIN12) | \
PIN_DMASK_EN(GPIOF_PIN13) | \
PIN_DMASK_EN(GPIOF_PIN14) | \
PIN_DMASK_EN(GPIOF_PIN15))
#define VAL_GPIOF_DBEN (PIN_DBNCE_DIS(GPIOF_OSC_IN) | \
PIN_DBNCE_DIS(GPIOF_OSC_OUT) | \
PIN_DBNCE_EN(GPIOF_I2C0_SDA) | \
PIN_DBNCE_EN(GPIOF_I2C0_SCL) | \
PIN_DBNCE_EN(GPIOF_PIN4) | \
PIN_DBNCE_EN(GPIOF_PIN5) | \
PIN_DBNCE_EN(GPIOF_PIN6) | \
PIN_DBNCE_EN(GPIOF_PIN7) | \
PIN_DBNCE_EN(GPIOF_PIN8) | \
PIN_DBNCE_EN(GPIOF_PIN9) | \
PIN_DBNCE_EN(GPIOF_PIN10) | \
PIN_DBNCE_EN(GPIOF_PIN11) | \
PIN_DBNCE_EN(GPIOF_PIN12) | \
PIN_DBNCE_EN(GPIOF_PIN13) | \
PIN_DBNCE_EN(GPIOF_PIN14) | \
PIN_DBNCE_EN(GPIOF_PIN15))
#define VAL_GPIOF_IMD (PIN_IMD_LVL(GPIOF_OSC_IN) | \
PIN_IMD_LVL(GPIOF_OSC_OUT) | \
PIN_IMD_EDGE(GPIOF_I2C0_SDA) | \
PIN_IMD_EDGE(GPIOF_I2C0_SCL) | \
PIN_IMD_EDGE(GPIOF_PIN4) | \
PIN_IMD_EDGE(GPIOF_PIN5) | \
PIN_IMD_EDGE(GPIOF_PIN6) | \
PIN_IMD_EDGE(GPIOF_PIN7) | \
PIN_IMD_EDGE(GPIOF_PIN8) | \
PIN_IMD_EDGE(GPIOF_PIN9) | \
PIN_IMD_EDGE(GPIOF_PIN10) | \
PIN_IMD_EDGE(GPIOF_PIN11) | \
PIN_IMD_EDGE(GPIOF_PIN12) | \
PIN_IMD_EDGE(GPIOF_PIN13) | \
PIN_IMD_EDGE(GPIOF_PIN14) | \
PIN_IMD_EDGE(GPIOF_PIN15))
#define VAL_GPIOF_IEN (PIN_IEN_FELL_DIS(GPIOF_OSC_IN) | \
PIN_IEN_FELL_DIS(GPIOF_OSC_OUT) | \
PIN_IEN_FELL_DIS(GPIOF_I2C0_SDA) | \
PIN_IEN_FELL_DIS(GPIOF_I2C0_SCL) | \
PIN_IEN_FELL_DIS(GPIOF_PIN4) | \
PIN_IEN_FELL_DIS(GPIOF_PIN5) | \
PIN_IEN_FELL_DIS(GPIOF_PIN6) | \
PIN_IEN_FELL_DIS(GPIOF_PIN7) | \
PIN_IEN_FELL_DIS(GPIOF_PIN8) | \
PIN_IEN_FELL_DIS(GPIOF_PIN9) | \
PIN_IEN_FELL_DIS(GPIOF_PIN10) | \
PIN_IEN_FELL_DIS(GPIOF_PIN11) | \
PIN_IEN_FELL_DIS(GPIOF_PIN12) | \
PIN_IEN_FELL_DIS(GPIOF_PIN13) | \
PIN_IEN_FELL_DIS(GPIOF_PIN14) | \
PIN_IEN_FELL_DIS(GPIOF_PIN15))
#define VAL_GPIOF_ISRC (PIN_ISRC_DIS(GPIOF_OSC_IN) | \
PIN_ISRC_DIS(GPIOF_OSC_OUT) | \
PIN_ISRC_DIS(GPIOF_I2C0_SDA) | \
PIN_ISRC_DIS(GPIOF_I2C0_SCL) | \
PIN_ISRC_DIS(GPIOF_PIN4) | \
PIN_ISRC_DIS(GPIOF_PIN5) | \
PIN_ISRC_DIS(GPIOF_PIN6) | \
PIN_ISRC_DIS(GPIOF_PIN7) | \
PIN_ISRC_DIS(GPIOF_PIN8) | \
PIN_ISRC_DIS(GPIOF_PIN9) | \
PIN_ISRC_DIS(GPIOF_PIN10) | \
PIN_ISRC_DIS(GPIOF_PIN11) | \
PIN_ISRC_DIS(GPIOF_PIN12) | \
PIN_ISRC_DIS(GPIOF_PIN13) | \
PIN_ISRC_DIS(GPIOF_PIN14) | \
PIN_ISRC_DIS(GPIOF_PIN15))
#define VAL_GPIOF_DOUT (PIN_DATA_LOW(GPIOF_OSC_IN) | \
PIN_DATA_LOW(GPIOF_OSC_OUT) | \
PIN_DATA_LOW(GPIOF_I2C0_SDA) | \
PIN_DATA_LOW(GPIOF_I2C0_SCL) | \
PIN_DATA_LOW(GPIOF_PIN4) | \
PIN_DATA_LOW(GPIOF_PIN5) | \
PIN_DATA_LOW(GPIOF_PIN6) | \
PIN_DATA_LOW(GPIOF_PIN7) | \
PIN_DATA_LOW(GPIOF_PIN8) | \
PIN_DATA_LOW(GPIOF_PIN9) | \
PIN_DATA_LOW(GPIOF_PIN10) | \
PIN_DATA_LOW(GPIOF_PIN11) | \
PIN_DATA_LOW(GPIOF_PIN12) | \
PIN_DATA_LOW(GPIOF_PIN13) | \
PIN_DATA_LOW(GPIOF_PIN14) | \
PIN_DATA_LOW(GPIOF_PIN15))
#if !defined(_FROM_ASM_)
#ifdef __cplusplus
extern "C" {
#endif
void boardInit(void);
#ifdef __cplusplus
}
#endif
#endif /* _FROM_ASM_ */
#endif /* BOARD_H */

5
keyboards/ducky/one2mini/boards/NUC123SD4AN0/board.mk Normal file
View File

@ -0,0 +1,5 @@
# List of all the board related files.
BOARDSRC = $(BOARD_PATH)/boards/NUC123SD4AN0/board.c
# Required include directories
BOARDINC = $(BOARD_PATH)/boards/NUC123SD4AN0

525
keyboards/ducky/one2mini/chconf.h Normal file
View File

@ -0,0 +1,525 @@
/*
ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
ChibiOS - Copyright (C) 2019 /u/KeepItUnder
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/**
* @file templates/chconf.h
* @brief Configuration file template.
* @details A copy of this file must be placed in each project directory, it
* contains the application specific kernel settings.
*
* @addtogroup config
* @details Kernel related settings and hooks.
* @{
*/
#ifndef CHCONF_H
#define CHCONF_H
#define _CHIBIOS_RT_CONF_
/*===========================================================================*/
/**
* @name System timers settings
* @{
*/
/*===========================================================================*/
/**
* @brief System time counter resolution.
* @note Allowed values are 16 or 32 bits.
*/
#define CH_CFG_ST_RESOLUTION 32
/**
* @brief System tick frequency.
* @details Frequency of the system timer that drives the system ticks. This
* setting also defines the system tick time unit.
*/
#define CH_CFG_ST_FREQUENCY 10000
/**
* @brief Time delta constant for the tick-less mode.
* @note If this value is zero then the system uses the classic
* periodic tick. This value represents the minimum number
* of ticks that is safe to specify in a timeout directive.
* The value one is not valid, timeouts are rounded up to
* this value.
*/
#define CH_CFG_ST_TIMEDELTA 0
/** @} */
/*===========================================================================*/
/**
* @name Kernel parameters and options
* @{
*/
/*===========================================================================*/
/**
* @brief Round robin interval.
* @details This constant is the number of system ticks allowed for the
* threads before preemption occurs. Setting this value to zero
* disables the preemption for threads with equal priority and the
* round robin becomes cooperative. Note that higher priority
* threads can still preempt, the kernel is always preemptive.
* @note Disabling the round robin preemption makes the kernel more compact
* and generally faster.
* @note The round robin preemption is not supported in tickless mode and
* must be set to zero in that case.
*/
#define CH_CFG_TIME_QUANTUM 0
/**
* @brief Managed RAM size.
* @details Size of the RAM area to be managed by the OS. If set to zero
* then the whole available RAM is used. The core memory is made
* available to the heap allocator and/or can be used directly through
* the simplified core memory allocator.
*
* @note In order to let the OS manage the whole RAM the linker script must
* provide the @p __heap_base__ and @p __heap_end__ symbols.
* @note Requires @p CH_CFG_USE_MEMCORE.
*/
#define CH_CFG_MEMCORE_SIZE 0
/**
* @brief Idle thread automatic spawn suppression.
* @details When this option is activated the function @p chSysInit()
* does not spawn the idle thread. The application @p main()
* function becomes the idle thread and must implement an
* infinite loop.
*/
#define CH_CFG_NO_IDLE_THREAD FALSE
/* Use __WFI in the idle thread for waiting. Does lower the power
* consumption. */
#define CORTEX_ENABLE_WFI_IDLE TRUE
/** @} */
/*===========================================================================*/
/**
* @name Performance options
* @{
*/
/*===========================================================================*/
/**
* @brief OS optimization.
* @details If enabled then time efficient rather than space efficient code
* is used when two possible implementations exist.
*
* @note This is not related to the compiler optimization options.
* @note The default is @p TRUE.
*/
#define CH_CFG_OPTIMIZE_SPEED FALSE
/** @} */
/*===========================================================================*/
/**
* @name Subsystem options
* @{
*/
/*===========================================================================*/
/**
* @brief Time Measurement APIs.
* @details If enabled then the time measurement APIs are included in
* the kernel.
*
* @note The default is @p TRUE.
*/
#define CH_CFG_USE_TM FALSE
/**
* @brief Threads registry APIs.
* @details If enabled then the registry APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#define CH_CFG_USE_REGISTRY TRUE
/**
* @brief Threads synchronization APIs.
* @details If enabled then the @p chThdWait() function is included in
* the kernel.
*
* @note The default is @p TRUE.
*/
#define CH_CFG_USE_WAITEXIT TRUE
/**
* @brief Semaphores APIs.
* @details If enabled then the Semaphores APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#define CH_CFG_USE_SEMAPHORES TRUE
/**
* @brief Semaphores queuing mode.
* @details If enabled then the threads are enqueued on semaphores by
* priority rather than in FIFO order.
*
* @note The default is @p FALSE. Enable this if you have special
* requirements.
* @note Requires @p CH_CFG_USE_SEMAPHORES.
*/
#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE
/**
* @brief Mutexes APIs.
* @details If enabled then the mutexes APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#define CH_CFG_USE_MUTEXES TRUE
/**
* @brief Enables recursive behavior on mutexes.
* @note Recursive mutexes are heavier and have an increased
* memory footprint.
*
* @note The default is @p FALSE.
* @note Requires @p CH_CFG_USE_MUTEXES.
*/
#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE
/**
* @brief Conditional Variables APIs.
* @details If enabled then the conditional variables APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_CFG_USE_MUTEXES.
*/
#define CH_CFG_USE_CONDVARS TRUE
/**
* @brief Conditional Variables APIs with timeout.
* @details If enabled then the conditional variables APIs with timeout
* specification are included in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_CFG_USE_CONDVARS.
*/
#define CH_CFG_USE_CONDVARS_TIMEOUT FALSE
/**
* @brief Events Flags APIs.
* @details If enabled then the event flags APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#define CH_CFG_USE_EVENTS TRUE
/**
* @brief Events Flags APIs with timeout.
* @details If enabled then the events APIs with timeout specification
* are included in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_CFG_USE_EVENTS.
*/
#define CH_CFG_USE_EVENTS_TIMEOUT TRUE
/**
* @brief Synchronous Messages APIs.
* @details If enabled then the synchronous messages APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
*/
#define CH_CFG_USE_MESSAGES TRUE
/**
* @brief Synchronous Messages queuing mode.
* @details If enabled then messages are served by priority rather than in
* FIFO order.
*
* @note The default is @p FALSE. Enable this if you have special
* requirements.
* @note Requires @p CH_CFG_USE_MESSAGES.
*/
#define CH_CFG_USE_MESSAGES_PRIORITY FALSE
/**
* @brief Mailboxes APIs.
* @details If enabled then the asynchronous messages (mailboxes) APIs are
* included in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_CFG_USE_SEMAPHORES.
*/
#define CH_CFG_USE_MAILBOXES TRUE
/**
* @brief Core Memory Manager APIs.
* @details If enabled then the core memory manager APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
*/
#define CH_CFG_USE_MEMCORE FALSE
/**
* @brief Heap Allocator APIs.
* @details If enabled then the memory heap allocator APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or
* @p CH_CFG_USE_SEMAPHORES.
* @note Mutexes are recommended.
*/
#define CH_CFG_USE_HEAP FALSE
/**
* @brief Memory Pools Allocator APIs.
* @details If enabled then the memory pools allocator APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
*/
#define CH_CFG_USE_MEMPOOLS FALSE
/**
* @brief Dynamic Threads APIs.
* @details If enabled then the dynamic threads creation APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_CFG_USE_WAITEXIT.
* @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.
*/
#define CH_CFG_USE_DYNAMIC FALSE
/** @} */
/*===========================================================================*/
/**
* @name Debug options
* @{
*/
/*===========================================================================*/
/**
* @brief Debug option, kernel statistics.
*
* @note The default is @p FALSE.
*/
#define CH_DBG_STATISTICS FALSE
/**
* @brief Debug option, system state check.
* @details If enabled the correct call protocol for system APIs is checked
* at runtime.
*
* @note The default is @p FALSE.
*/
#define CH_DBG_SYSTEM_STATE_CHECK FALSE
/**
* @brief Debug option, parameters checks.
* @details If enabled then the checks on the API functions input
* parameters are activated.
*
* @note The default is @p FALSE.
*/
#define CH_DBG_ENABLE_CHECKS FALSE
/**
* @brief Debug option, consistency checks.
* @details If enabled then all the assertions in the kernel code are
* activated. This includes consistency checks inside the kernel,
* runtime anomalies and port-defined checks.
*
* @note The default is @p FALSE.
*/
#define CH_DBG_ENABLE_ASSERTS FALSE
/**
* @brief Debug option, trace buffer.
* @details If enabled then the trace buffer is activated.
*
* @note The default is @p CH_DBG_TRACE_MASK_DISABLED.
*/
#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_DISABLED
/**
* @brief Trace buffer entries.
* @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is
* different from @p CH_DBG_TRACE_MASK_DISABLED.
*/
#define CH_DBG_TRACE_BUFFER_SIZE 128
/**
* @brief Debug option, stack checks.
* @details If enabled then a runtime stack check is performed.
*
* @note The default is @p FALSE.
* @note The stack check is performed in a architecture/port dependent way.
* It may not be implemented or some ports.
* @note The default failure mode is to halt the system with the global
* @p panic_msg variable set to @p NULL.
*/
#define CH_DBG_ENABLE_STACK_CHECK FALSE
/**
* @brief Debug option, stacks initialization.
* @details If enabled then the threads working area is filled with a byte
* value when a thread is created. This can be useful for the
* runtime measurement of the used stack.
*
* @note The default is @p FALSE.
*/
#define CH_DBG_FILL_THREADS FALSE
/**
* @brief Debug option, threads profiling.
* @details If enabled then a field is added to the @p thread_t structure that
* counts the system ticks occurred while executing the thread.
*
* @note The default is @p FALSE.
* @note This debug option is not currently compatible with the
* tickless mode.
*/
#define CH_DBG_THREADS_PROFILING FALSE
/** @} */
/*===========================================================================*/
/**
* @name Kernel hooks
* @{
*/
/*===========================================================================*/
/**
* @brief Threads descriptor structure extension.
* @details User fields added to the end of the @p thread_t structure.
*/
#define CH_CFG_THREAD_EXTRA_FIELDS \
/* Add threads custom fields here.*/
/**
* @brief Threads initialization hook.
* @details User initialization code added to the @p chThdInit() API.
*
* @note It is invoked from within @p chThdInit() and implicitly from all
* the threads creation APIs.
*/
#define CH_CFG_THREAD_INIT_HOOK(tp) { \
/* Add threads initialization code here.*/ \
}
/**
* @brief Threads finalization hook.
* @details User finalization code added to the @p chThdExit() API.
*/
#define CH_CFG_THREAD_EXIT_HOOK(tp) { \
/* Add threads finalization code here.*/ \
}
/**
* @brief Context switch hook.
* @details This hook is invoked just before switching between threads.
*/
#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \
/* Context switch code here.*/ \
}
/**
* @brief ISR enter hook.
*/
#define CH_CFG_IRQ_PROLOGUE_HOOK() { \
/* IRQ prologue code here.*/ \
}
/**
* @brief ISR exit hook.
*/
#define CH_CFG_IRQ_EPILOGUE_HOOK() { \
/* IRQ epilogue code here.*/ \
}
/**
* @brief Idle thread enter hook.
* @note This hook is invoked within a critical zone, no OS functions
* should be invoked from here.
* @note This macro can be used to activate a power saving mode.
*/
#define CH_CFG_IDLE_ENTER_HOOK() { \
/* Idle-enter code here.*/ \
}
/**
* @brief Idle thread leave hook.
* @note This hook is invoked within a critical zone, no OS functions
* should be invoked from here.
* @note This macro can be used to deactivate a power saving mode.
*/
#define CH_CFG_IDLE_LEAVE_HOOK() { \
/* Idle-leave code here.*/ \
}
/**
* @brief Idle Loop hook.
* @details This hook is continuously invoked by the idle thread loop.
*/
#define CH_CFG_IDLE_LOOP_HOOK() { \
/* Idle loop code here.*/ \
}
/**
* @brief System tick event hook.
* @details This hook is invoked in the system tick handler immediately
* after processing the virtual timers queue.
*/
#define CH_CFG_SYSTEM_TICK_HOOK() { \
/* System tick event code here.*/ \
}
/**
* @brief System halt hook.
* @details This hook is invoked in case to a system halting error before
* the system is halted.
*/
#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \
/* System halt code here.*/ \
}
/**
* @brief Trace hook.
* @details This hook is invoked each time a new record is written in the
* trace buffer.
*/
#define CH_CFG_TRACE_HOOK(tep) { \
/* Trace code here.*/ \
}
/** @} */
/*===========================================================================*/
/* Port-specific settings (override port settings defaulted in chcore.h). */
/*===========================================================================*/
#endif /* CHCONF_H */
/** @} */

169
keyboards/ducky/one2mini/config.h Normal file
View File

@ -0,0 +1,169 @@
/*
Copyright 2019 /u/KeepItUnder
This program is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include "config_common.h"
/* USB Device descriptor parameter */
#define VENDOR_ID 0x0416
#define PRODUCT_ID 0x0123
#define DEVICE_VER 0x0001
#define MANUFACTURER Ducky
#define PRODUCT One2mini
#define DESCRIPTION Ducky One 2 mini RGB 60% keyboard
/* key matrix size */
#define MATRIX_ROWS 5
#define MATRIX_COLS 15
/*
* Keyboard Matrix Assignments
*
* Change this to how you wired your keyboard
* COLS: AVR pins used for columns, left to right
* ROWS: AVR pins used for rows, top to bottom
* DIODE_DIRECTION: COL2ROW = COL = Anode (+), ROW = Cathode (-, marked on diode)
* ROW2COL = ROW = Anode (+), COL = Cathode (-, marked on diode)
*
*/
#define MATRIX_ROW_PINS { D11, B4, B5, B6, B7 }
#define MATRIX_COL_PINS { B10, B9, C13, C12, C11, C10, C9, C8, A15, A14, A13, D0, D1, D2, B8 }
#define UNUSED_PINS
/* COL2ROW, ROW2COL*/
#define DIODE_DIRECTION COL2ROW
/*
* RGB Matrix defines
*
* Ducky One2mini uses MBI5042GP PWM drivers and has 5 rows/14 columns of RBG LED matrix
*
*/
#define DRIVER_LED_TOTAL 62
#define RGB_MATRIX_KEYPRESSES
/* Debounce reduces chatter (unintended double-presses) - set 0 if debouncing is not needed */
#define DEBOUNCING_DELAY 0
/* number of backlight levels */
/* Mechanical locking support. Use KC_LCAP, KC_LNUM or KC_LSCR instead in keymap */
/*#define LOCKING_SUPPORT_ENABLE*/
/* Locking resynchronize hack */
/*#define LOCKING_RESYNC_ENABLE*/
/* If defined, GRAVE_ESC will always act as ESC when CTRL is held.
* This is userful for the Windows task manager shortcut (ctrl+shift+esc).
*/
// #define GRAVE_ESC_CTRL_OVERRIDE
/*
* Force NKRO
*
* Force NKRO (nKey Rollover) to be enabled by default, regardless of the saved
* state in the bootmagic EEPROM settings. (Note that NKRO must be enabled in the
* makefile for this to work.)
*
* If forced on, NKRO can be disabled via magic key (default = LShift+RShift+N)
* until the next keyboard reset.
*
* NKRO may prevent your keystrokes from being detected in the BIOS, but it is
* fully operational during normal computer usage.
*
* For a less heavy-handed approach, enable NKRO via magic key (LShift+RShift+N)
* or via bootmagic (hold SPACE+N while plugging in the keyboard). Once set by
* bootmagic, NKRO mode will always be enabled until it is toggled again during a
* power-up.
*
*/
#define FORCE_NKRO
/*
* Magic Key Options
*
* Magic keys are hotkey commands that allow control over firmware functions of
* the keyboard. They are best used in combination with the HID Listen program,
* found here: https://www.pjrc.com/teensy/hid_listen.html
*
* The options below allow the magic key functionality to be changed. This is
* useful if your keyboard/keypad is missing keys and you want magic key support.
*
*/
/* key combination for magic key command */
/* defined by default; to change, uncomment and set to the combination you want */
// #define IS_COMMAND() (get_mods() == (MOD_BIT(KC_LSHIFT) | MOD_BIT(KC_RSHIFT)))
/* control how magic key switches layers */
//#define MAGIC_KEY_SWITCH_LAYER_WITH_FKEYS true
//#define MAGIC_KEY_SWITCH_LAYER_WITH_NKEYS true
//#define MAGIC_KEY_SWITCH_LAYER_WITH_CUSTOM false
/* override magic key keymap */
//#define MAGIC_KEY_SWITCH_LAYER_WITH_FKEYS
//#define MAGIC_KEY_SWITCH_LAYER_WITH_NKEYS
//#define MAGIC_KEY_SWITCH_LAYER_WITH_CUSTOM
//#define MAGIC_KEY_HELP H
//#define MAGIC_KEY_HELP_ALT SLASH
//#define MAGIC_KEY_DEBUG D
//#define MAGIC_KEY_DEBUG_MATRIX X
//#define MAGIC_KEY_DEBUG_KBD K
//#define MAGIC_KEY_DEBUG_MOUSE M
//#define MAGIC_KEY_VERSION V
//#define MAGIC_KEY_STATUS S
//#define MAGIC_KEY_CONSOLE C
//#define MAGIC_KEY_LAYER0 0
//#define MAGIC_KEY_LAYER0_ALT GRAVE
//#define MAGIC_KEY_LAYER1 1
//#define MAGIC_KEY_LAYER2 2
//#define MAGIC_KEY_LAYER3 3
//#define MAGIC_KEY_LAYER4 4
//#define MAGIC_KEY_LAYER5 5
//#define MAGIC_KEY_LAYER6 6
//#define MAGIC_KEY_LAYER7 7
//#define MAGIC_KEY_LAYER8 8
//#define MAGIC_KEY_LAYER9 9
//#define MAGIC_KEY_BOOTLOADER B
//#define MAGIC_KEY_BOOTLOADER_ALT ESC
//#define MAGIC_KEY_LOCK CAPS
//#define MAGIC_KEY_EEPROM E
//#define MAGIC_KEY_EEPROM_CLEAR BSPACE
//#define MAGIC_KEY_NKRO N
//#define MAGIC_KEY_SLEEP_LED Z
/*
* Feature disable options
* These options are also useful to firmware size reduction.
*/
/* disable debug print */
//#define NO_DEBUG
/* disable print */
//#define NO_PRINT
/* disable action features */
//#define NO_ACTION_LAYER
//#define NO_ACTION_TAPPING
//#define NO_ACTION_ONESHOT
//#define NO_ACTION_MACRO
//#define NO_ACTION_FUNCTION
/* Bootmagic Lite key configuration */
// #define BOOTMAGIC_LITE_ROW 0
// #define BOOTMAGIC_LITE_COLUMN 0

355
keyboards/ducky/one2mini/halconf.h Normal file
View File

@ -0,0 +1,355 @@
/*
ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
ChibiOS - Copyright (C) 2019 /u/KeepItUnder
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/**
* @file templates/halconf.h
* @brief HAL configuration header.
* @details HAL configuration file, this file allows to enable or disable the
* various device drivers from your application. You may also use
* this file in order to override the device drivers default settings.
*
* @addtogroup HAL_CONF
* @{
*/
#ifndef _HALCONF_H_
#define _HALCONF_H_
#include "mcuconf.h"
/**
* @brief Enables the PAL subsystem.
*/
#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
#define HAL_USE_PAL TRUE
#endif
/**
* @brief Enables the ADC subsystem.
*/
#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
#define HAL_USE_ADC FALSE
#endif
/**
* @brief Enables the CAN subsystem.
*/
#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
#define HAL_USE_CAN FALSE
#endif
/**
* @brief Enables the DAC subsystem.
*/
#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
#define HAL_USE_DAC FALSE
#endif
/**
* @brief Enables the EXT subsystem.
*/
#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
#define HAL_USE_EXT FALSE
#endif
/**
* @brief Enables the GPT subsystem.
*/
#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
#define HAL_USE_GPT FALSE
#endif
/**
* @brief Enables the I2C subsystem.
*/
#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
#define HAL_USE_I2C FALSE
#endif
/**
* @brief Enables the I2S subsystem.
*/
#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)
#define HAL_USE_I2S FALSE
#endif
/**
* @brief Enables the ICU subsystem.
*/
#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
#define HAL_USE_ICU FALSE
#endif
/**
* @brief Enables the MAC subsystem.
*/
#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
#define HAL_USE_MAC FALSE
#endif
/**
* @brief Enables the MMC_SPI subsystem.
*/
#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
#define HAL_USE_MMC_SPI FALSE
#endif
/**
* @brief Enables the PWM subsystem.
*/
#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
#define HAL_USE_PWM FALSE
#endif
/**
* @brief Enables the RTC subsystem.
*/
#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
#define HAL_USE_RTC FALSE
#endif
/**
* @brief Enables the SDC subsystem.
*/
#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
#define HAL_USE_SDC FALSE
#endif
/**
* @brief Enables the SERIAL subsystem.
*/
#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
#define HAL_USE_SERIAL FALSE
#endif
/**
* @brief Enables the SERIAL over USB subsystem.
*/
#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
#define HAL_USE_SERIAL_USB FALSE
#endif
/**
* @brief Enables the SPI subsystem.
*/
#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
#define HAL_USE_SPI FALSE
#endif
/**
* @brief Enables the UART subsystem.
*/
#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
#define HAL_USE_UART FALSE
#endif
/**
* @brief Enables the USB subsystem.
*/
#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
#define HAL_USE_USB TRUE
#endif
/**
* @brief Enables the WDG subsystem.
*/
#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__)
#define HAL_USE_WDG FALSE
#endif
/*===========================================================================*/
/* ADC driver related settings. */
/*===========================================================================*/
/**
* @brief Enables synchronous APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
#define ADC_USE_WAIT TRUE
#endif
/**
* @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
#define ADC_USE_MUTUAL_EXCLUSION TRUE
#endif
/*===========================================================================*/
/* CAN driver related settings. */
/*===========================================================================*/
/**
* @brief Sleep mode related APIs inclusion switch.
*/
#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
#define CAN_USE_SLEEP_MODE TRUE
#endif
/*===========================================================================*/
/* I2C driver related settings. */
/*===========================================================================*/
/**
* @brief Enables the mutual exclusion APIs on the I2C bus.
*/
#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
#define I2C_USE_MUTUAL_EXCLUSION TRUE
#endif
/*===========================================================================*/
/* MAC driver related settings. */
/*===========================================================================*/
/**
* @brief Enables an event sources for incoming packets.
*/
#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
#define MAC_USE_ZERO_COPY FALSE
#endif
/**
* @brief Enables an event sources for incoming packets.
*/
#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
#define MAC_USE_EVENTS TRUE
#endif
/*===========================================================================*/
/* MMC_SPI driver related settings. */
/*===========================================================================*/
/**
* @brief Delays insertions.
* @details If enabled this options inserts delays into the MMC waiting
* routines releasing some extra CPU time for the threads with
* lower priority, this may slow down the driver a bit however.
* This option is recommended also if the SPI driver does not
* use a DMA channel and heavily loads the CPU.
*/
#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
#define MMC_NICE_WAITING TRUE
#endif
/*===========================================================================*/
/* SDC driver related settings. */
/*===========================================================================*/
/**
* @brief Number of initialization attempts before rejecting the card.
* @note Attempts are performed at 10mS intervals.
*/
#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
#define SDC_INIT_RETRY 100
#endif
/**
* @brief Include support for MMC cards.
* @note MMC support is not yet implemented so this option must be kept
* at @p FALSE.
*/
#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
#define SDC_MMC_SUPPORT FALSE
#endif
/**
* @brief Delays insertions.
* @details If enabled this options inserts delays into the MMC waiting
* routines releasing some extra CPU time for the threads with
* lower priority, this may slow down the driver a bit however.
*/
#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
#define SDC_NICE_WAITING TRUE
#endif
/*===========================================================================*/
/* SERIAL driver related settings. */
/*===========================================================================*/
/**
* @brief Default bit rate.
* @details Configuration parameter, this is the baud rate selected for the
* default configuration.
*/
#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
#define SERIAL_DEFAULT_BITRATE 38400
#endif
/**
* @brief Serial buffers size.
* @details Configuration parameter, you can change the depth of the queue
* buffers depending on the requirements of your application.
* @note The default is 64 bytes for both the transmission and receive
* buffers.
*/
#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
#define SERIAL_BUFFERS_SIZE 16
#endif
/*===========================================================================*/
/* SERIAL_USB driver related setting. */
/*===========================================================================*/
/**
* @brief Serial over USB buffers size.
* @details Configuration parameter, the buffer size must be a multiple of
* the USB data endpoint maximum packet size.
* @note The default is 64 bytes for both the transmission and receive
* buffers.
*/
#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__)
#define SERIAL_USB_BUFFERS_SIZE 1
#endif
/*===========================================================================*/
/* SPI driver related settings. */
/*===========================================================================*/
/**
* @brief Enables synchronous APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
#define SPI_USE_WAIT TRUE
#endif
/**
* @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
#define SPI_USE_MUTUAL_EXCLUSION TRUE
#endif
/*===========================================================================*/
/* USB driver related settings. */
/*===========================================================================*/
/**
* @brief Enables synchronous APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__)
#define USB_USE_WAIT TRUE
#endif
#endif /* _HALCONF_H_ */
/** @} */

4
keyboards/ducky/one2mini/info.json Normal file
View File

@ -0,0 +1,4 @@
{
"manufacturer": "Ducky",
"maintainer": "GitWellBack"
}

19
keyboards/ducky/one2mini/keymaps/default/config.h Normal file
View File

@ -0,0 +1,19 @@
/* Copyright 2019 /u/KeepItUnder
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
// place overrides here

85
keyboards/ducky/one2mini/keymaps/default/keymap.c Normal file
View File

@ -0,0 +1,85 @@
/* Copyright 2019 /u/KeepItUnder
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include QMK_KEYBOARD_H
// LAYERS
#define _QWERTY 0 // Standard QWERTY layer
#define _QW _QWERTY
#define _FUNCTION 1 // Function key layer
#define _FN _FUNCTION
#define _COLOUR 2 // RGB key layer
#define _CLR _COLOUR
#define MO_FN MO(1)
#define MO_CLR MO(2)
// Defines the keycodes used by our macros in process_record_user
enum custom_keycodes {
DK_SW1,
DK_SW2,
DK_SW3,
DK_SW4,
QMKBEST = SAFE_RANGE,
QMKURL
};
const uint16_t PROGMEM keymaps[][MATRIX_ROWS][MATRIX_COLS] = {
[_QWERTY] = LAYOUT_ISO(
// 2 3 4 5 6 7 8 9 10 11 12 13 14 15
KC_GESC, KC_1, KC_2, KC_3, KC_4, KC_5, KC_6, KC_7, KC_8, KC_9, KC_0, KC_MINS, KC_EQL, KC_BSPC, DK_SW1,
KC_TAB, KC_Q, KC_W, KC_E, KC_R, KC_T, KC_Y, KC_U, KC_I, KC_O, KC_P, KC_LBRC, KC_RBRC, DK_SW2,
KC_CAPS, KC_A, KC_S, KC_D, KC_F, KC_G, KC_H, KC_J, KC_K, KC_L, KC_SCLN, KC_QUOT, KC_NUHS, KC_ENT, DK_SW3,
KC_LSFT, KC_NUBS, KC_Z, KC_X, KC_C, KC_V, KC_B, KC_N, KC_M, KC_COMM, KC_DOT, KC_SLSH, KC_RSFT, DK_SW4,
KC_LCTL, KC_LGUI, KC_LALT, KC_SPC, KC_RALT, KC_RGUI, MO(_FN), KC_RCTL, KC_NO
),
[_FUNCTION] = LAYOUT_ISO(
// 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
KC_GRV, KC_F1, KC_F2, KC_F3, KC_F4, KC_F5, KC_F6, KC_F7, KC_F8, KC_F9, KC_F10, KC_F11, KC_F12, KC_DEL, _______,
_______, KC_BTN1, KC_MS_U, KC_BTN2, KC_WH_U, _______, KC_INS, _______, KC_UP, KC_PAUS, KC_PGUP, KC_HOME, KC_PSCR, _______,
_______, KC_MS_L, KC_MS_D, KC_MS_R, KC_WH_D, _______, KC_SLCK, KC_LEFT, KC_DOWN, KC_RGHT, KC_PGDN, KC_END, _______, KC_ENT, _______,
_______, _______, _______, KC_APP, _______, _______, _______, KC_CALC, KC_MUTE, KC_VOLD, KC_VOLU, _______, _______, _______,
_______, KC_APP, MO(_CLR), _______, _______, KC_APP, _______, _______, _______
),
[_COLOUR] = LAYOUT_ISO(
// 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
_______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______,
_______, _______, _______, _______, _______, RGB_MOD, _______, _______, _______, _______, _______, _______, _______, _______,
_______, _______, RGB_HUI, RGB_SAI, RGB_VAI, RGB_SPI, _______, _______, _______, _______, _______, _______, _______, _______, _______,
_______, _______, RGB_HUD, RGB_SAD, RGB_VAD, RGB_SPD, _______, _______, _______, _______, _______, _______, _______, _______,
_______, _______, _______, RGB_TOG, _______, _______, _______, _______, _______
),
};
bool process_record_user(uint16_t keycode, keyrecord_t *record) {
// switch (keycode) {
// }
return true;
}
// void matrix_init_user(void) {
// }
// void matrix_scan_user(void) {
// }
// void led_set_user(uint8_t usb_led) {
// }

1
keyboards/ducky/one2mini/keymaps/default/readme.md Normal file
View File

@ -0,0 +1 @@
# The default keymap for one2mini (ISO - ANSI to follow)

229
keyboards/ducky/one2mini/matrix.c Normal file
View File

@ -0,0 +1,229 @@
/*
Copyright 2012-2018 Jun Wako, Jack Humbert, Yiancar
Copyright 2019 /u/KeepItUnder
This program is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include <stdint.h>
#include <stdbool.h>
#include "wait.h"
#include "print.h"
#include "debug.h"
#include "util.h"
#include "matrix.h"
#include "debounce.h"
#include "quantum.h"
#if (MATRIX_COLS <= 8)
# define print_matrix_header() print("\nr/c 01234567\n")
# define print_matrix_row(row) print_bin_reverse8(matrix_get_row(row))
# define matrix_bitpop(i) bitpop(matrix[i])
# define ROW_SHIFTER ((uint8_t)1)
#elif (MATRIX_COLS <= 16)
# define print_matrix_header() print("\nr/c 0123456789ABCDEF\n")
# define print_matrix_row(row) print_bin_reverse16(matrix_get_row(row))
# define matrix_bitpop(i) bitpop16(matrix[i])
# define ROW_SHIFTER ((uint16_t)1)
#elif (MATRIX_COLS <= 32)
# define print_matrix_header() print("\nr/c 0123456789ABCDEF0123456789ABCDEF\n")
# define print_matrix_row(row) print_bin_reverse32(matrix_get_row(row))
# define matrix_bitpop(i) bitpop32(matrix[i])
# define ROW_SHIFTER ((uint32_t)1)
#endif
#ifdef MATRIX_MASKED
extern const matrix_row_t matrix_mask[];
#endif
#if (DIODE_DIRECTION == ROW2COL) || (DIODE_DIRECTION == COL2ROW)
static const pin_t row_pins[MATRIX_ROWS] = MATRIX_ROW_PINS;
static const pin_t col_pins[MATRIX_COLS] = MATRIX_COL_PINS;
#endif
/* matrix state(1:on, 0:off) */
static matrix_row_t raw_matrix[MATRIX_ROWS]; //raw values
static matrix_row_t matrix[MATRIX_ROWS]; //debounced values
#if (DIODE_DIRECTION == COL2ROW)
static void init_cols(void);
static bool read_cols_on_row(matrix_row_t current_matrix[], uint8_t current_row);
static void unselect_rows(void);
static void select_row(uint8_t row);
static void unselect_row(uint8_t row);
#elif (DIODE_DIRECTION == ROW2COL)
static void init_rows(void);
static bool read_rows_on_col(matrix_row_t current_matrix[], uint8_t current_col);
static void unselect_cols(void);
static void unselect_col(uint8_t col);
static void select_col(uint8_t col);
#endif
__attribute__ ((weak))
void matrix_init_quantum(void) {
matrix_init_kb();
}
__attribute__ ((weak))
void matrix_scan_quantum(void) {
matrix_scan_kb();
}
__attribute__ ((weak))
void matrix_init_kb(void) {
matrix_init_user();
}
__attribute__ ((weak))
void matrix_scan_kb(void) {
matrix_scan_user();
}
__attribute__ ((weak))
void matrix_init_user(void) {
}
__attribute__ ((weak))
void matrix_scan_user(void) {
}
inline
uint8_t matrix_rows(void) {
return MATRIX_ROWS;
}
inline
uint8_t matrix_cols(void) {
return MATRIX_COLS;
}
void matrix_init(void) {
unselect_rows();
init_cols();
// initialize matrix state: all keys off
for (uint8_t i=0; i < MATRIX_ROWS; i++) {
raw_matrix[i] = 0;
matrix[i] = 0;
}
debounce_init(MATRIX_ROWS);
matrix_init_quantum();
}
uint8_t matrix_scan(void)
{
bool changed = false;
// Set row, read cols
for (uint8_t current_row = 0; current_row < MATRIX_ROWS; current_row++) {
changed |= read_cols_on_row(raw_matrix, current_row);
}
debounce(raw_matrix, matrix, MATRIX_ROWS, changed);
matrix_scan_quantum();
return 1;
}
inline
bool matrix_is_on(uint8_t row, uint8_t col)
{
return (matrix[row] & ((matrix_row_t)1<<col));
}
inline
matrix_row_t matrix_get_row(uint8_t row)
{
// Matrix mask lets you disable switches in the returned matrix data. For example, if you have a
// switch blocker installed and the switch is always pressed.
#ifdef MATRIX_MASKED
return matrix[row] & matrix_mask[row];
#else
return matrix[row];
#endif
}
void matrix_print(void)
{
print_matrix_header();
for (uint8_t row = 0; row < MATRIX_ROWS; row++) {
phex(row); print(": ");
print_matrix_row(row);
print("\n");
}
}
uint8_t matrix_key_count(void)
{
uint8_t count = 0;
for (uint8_t i = 0; i < MATRIX_ROWS; i++) {
count += matrix_bitpop(i);
}
return count;
}
static void init_cols(void)
{
for(uint8_t x = 0; x < MATRIX_COLS; x++) {
setPinInputHigh(col_pins[x]);
}
}
static bool read_cols_on_row(matrix_row_t current_matrix[], uint8_t current_row)
{
// Store last value of row prior to reading
matrix_row_t last_row_value = current_matrix[current_row];
// Clear data in matrix row
current_matrix[current_row] = 0;
// Select row and wait for row selecton to stabilize
select_row(current_row);
wait_us(30);
// For each col...
for(uint8_t col_index = 0; col_index < MATRIX_COLS; col_index++) {
// Select the col pin to read (active low)
uint8_t pin_state = readPin(col_pins[col_index]);
// Populate the matrix row with the state of the col pin
current_matrix[current_row] |= pin_state ? 0 : (ROW_SHIFTER << col_index);
}
// Unselect row
unselect_row(current_row);
return (last_row_value != current_matrix[current_row]);
}
static void select_row(uint8_t row)
{
setPinOutput(row_pins[row]);
writePinLow(row_pins[row]);
}
static void unselect_row(uint8_t row)
{
writePinHigh(row_pins[row]);
}
static void unselect_rows(void)
{
for(uint8_t x = 0; x < MATRIX_ROWS; x++) {
writePinHigh(row_pins[x]);
}
}

140
keyboards/ducky/one2mini/mcuconf.h Normal file
View File

@ -0,0 +1,140 @@
/*
ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
ChibiOS - Copyright (C) 2019 /u/KeepItUnder
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#ifndef _MCUCONF_H_
#define _MCUCONF_H_
/*
* NUC123SD4AN0 drivers configuration.
* The following settings override the default settings present in
* the various device driver implementation headers.
* Note that the settings for each driver only have effect if the whole
* driver is enabled in halconf.h.
*
* IRQ priorities:
* 3...0 Lowest...Highest.
*
* DMA priorities:
* 5...0 Lowest...Highest.
*/
#define NUC123SD4AN0_MCUCONF
/*
* HAL driver system settings.
*/
#define NUC123_NO_INIT FALSE
#define NUC123_PVD_ENABLE FALSE
#define NUC123_PLS NUC123_PLS_LEV0
#define NUC123_HSI_ENABLED TRUE
#define NUC123_LSI_ENABLED TRUE
#define NUC123_HSE_ENABLED TRUE
#define NUC123_LSE_ENABLED FALSE
#define NUC123_SW NUC123_SW_HCLK_2
#define NUC123_PLLSRC NUC123_PLLSRC_HSI_DIV2
#define NUC123_I2C1SW NUC123_I2C1SW_HSI
#define NUC123_USART1SW NUC123_USART1SW_PCLK
/*
* ADC driver system settings.
*/
#define NUC123_ADC_USE_ADC1 FALSE
#define NUC123_ADC_ADC1_DMA_PRIORITY 2
#define NUC123_ADC_IRQ_PRIORITY 2
#define NUC123_ADC_ADC1_DMA_IRQ_PRIORITY 2
/*
* GPT driver system settings.
*/
#define NUC123_GPT_USE_TIM1 FALSE
#define NUC123_GPT_USE_TIM2 FALSE
#define NUC123_GPT_USE_TIM3 FALSE
#define NUC123_GPT_TIM1_IRQ_PRIORITY 2
#define NUC123_GPT_TIM2_IRQ_PRIORITY 2
#define NUC123_GPT_TIM3_IRQ_PRIORITY 2
/*
* I2C driver system settings.
*/
#define NUC123_I2C_USE_I2C1 FALSE
#define NUC123_I2C_USE_I2C2 FALSE
#define NUC123_I2C_BUSY_TIMEOUT 50
#define NUC123_I2C_I2C1_IRQ_PRIORITY 3
#define NUC123_I2C_I2C2_IRQ_PRIORITY 3
#define NUC123_I2C_USE_DMA TRUE
#define NUC123_I2C_I2C1_DMA_PRIORITY 1
#define NUC123_I2C_I2C2_DMA_PRIORITY 1
#define NUC123_I2C_I2C1_RX_DMA_STREAM NUC123_DMA_STREAM_ID(1, 7)
#define NUC123_I2C_I2C1_TX_DMA_STREAM NUC123_DMA_STREAM_ID(1, 6)
#define NUC123_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
/*
* PWM driver system settings.
*/
#define NUC123_PWM_USE_ADVANCED FALSE
#define NUC123_PWM_USE_TIM1 FALSE
#define NUC123_PWM_USE_TIM2 FALSE
#define NUC123_PWM_USE_TIM3 TRUE
#define NUC123_PWM_TIM1_IRQ_PRIORITY 3
#define NUC123_PWM_TIM2_IRQ_PRIORITY 3
#define NUC123_PWM_TIM3_IRQ_PRIORITY 3
/*
* SERIAL driver system settings.
*/
#define NUC123_SERIAL_USE_UART1 FALSE
#define NUC123_SERIAL_USE_UART2 FALSE
#define NUC123_SERIAL_USART1_PRIORITY 3
#define NUC123_SERIAL_USART2_PRIORITY 3
/*
* SPI driver system settings.
*/
#define NUC123_SPI_USE_SPI1 FALSE
#define NUC123_SPI_USE_SPI2 FALSE
#define NUC123_SPI_SPI1_DMA_PRIORITY 1
#define NUC123_SPI_SPI2_DMA_PRIORITY 1
#define NUC123_SPI_SPI1_IRQ_PRIORITY 2
#define NUC123_SPI_SPI2_IRQ_PRIORITY 2
#define NUC123_SPI_SPI2_RX_DMA_STREAM NUC123_DMA_STREAM_ID(1, 4)
#define NUC123_SPI_SPI2_TX_DMA_STREAM NUC123_DMA_STREAM_ID(1, 5)
#define NUC123_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure")
/*
* ST driver system settings.
*/
#define NUC123_ST_IRQ_PRIORITY 2
#define NUC123_ST_USE_TIMER 2
/*
* UART driver system settings.
*/
#define NUC123_UART_USE_USART1 FALSE
#define NUC123_UART_USE_USART2 FALSE
#define NUC123_UART_USART1_IRQ_PRIORITY 3
#define NUC123_UART_USART2_IRQ_PRIORITY 3
#define NUC123_UART_USART1_DMA_PRIORITY 0
#define NUC123_UART_USART2_DMA_PRIORITY 0
#define NUC123_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure")
/*
* USB driver system settings.
*/
#define NUC123_USB_USE_USB1 TRUE
#define NUC123_USB_LOW_POWER_ON_SUSPEND FALSE
#endif /* _MCUCONF_H_ */

156
keyboards/ducky/one2mini/one2mini.c Normal file
View File

@ -0,0 +1,156 @@
/* Copyright 2019 /u/KeepItUnder
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include "one2mini.h"
/**
* @brief Board-specific bootmagic code.
* @details We want to avoid entering bootloader without holding two keys.
* In this case the Ducky originals - "D" and "L".
* These are D {2,3} and L {2,9}
* We also need to avoid debounce by scanning twice with delay.
*/
void bootmagic_lite(void) {
matrix_scan();
wait_ms(DEBOUNCING_DELAY);
wait_ms(DEBOUNCING_DELAY);
matrix_scan();
uint8_t valMatrixRow = 0U;
valMatrixRow = matrix_get_row(2);
if ( ( valMatrixRow & (1<<3) ) &&
( valMatrixRow & (1<<9) ) ) {
// Jump to bootloader.
bootloader_jump();
}
valMatrixRow = matrix_get_row(3);
if ( ( valMatrixRow & (1<<2) ) &&
( valMatrixRow & (1<<3) ) ) {
// Jump to bootloader.
bootloader_jump();
}
}
/**
* @brief RGB Matrix LED layout
* @details We need a layout for ISO and ANSI
*/
#define USB_LED_CAPSLOCK_INDEX 28 /* Location of CAPS LOCK led in matrix */
rgb_led g_rgb_leds[DRIVER_LED_TOTAL] = {
/**
* RGB Layout
*
* 0_0, 0_1, 0_2, 0_3, 0_4, 0_5, 0_6, 0_7, 0_8, 0_9, 0_10, 0_11, 0_12, 0_13
* 1_0, 1_1, 1_2, 1_3, 1_4, 1_5, 1_6, 1_7, 1_8, 1_9, 1_10, 1_11, 1_12, ----
* 2_0, 2_1, 2_2, 2_3, 2_4, 2_5, 2_6, 2_7, 2_8, 2_9, 2_10, 2_11, 2_12, 2_13
* 3_0, 3_1, 3_2, 3_3, 3_4, 3_5, 3_6, 3_7, 3_8, 3_9, 3_10, 3_11, 3_12, ----
* 4_0, 4_1, 4_2, ---, ---, 4_5, ---, ---, ---, ---, 4_10, 4_11, 4_12, 4_13
*
*/
{{0|(0<<4)}, {0, 0}, 4},
{{0|(1<<4)}, {16, 0}, 4},
{{0|(2<<4)}, {32, 0}, 4},
{{0|(3<<4)}, {48, 0}, 4},
{{0|(4<<4)}, {64, 0}, 4},
{{0|(5<<4)}, {80, 0}, 4},
{{0|(6<<4)}, {96, 0}, 4},
{{0|(7<<4)}, {112, 0}, 4},
{{0|(8<<4)}, {128, 0}, 4},
{{0|(9<<4)}, {144, 0}, 4},
{{0|(10<<4)}, {160, 0}, 4},
{{0|(11<<4)}, {176, 0}, 4},
{{0|(12<<4)}, {192, 0}, 4},
{{0|(13<<4)}, {224, 0}, 4},
{{1|(0<<4)}, {0, 16}, 4},
{{1|(1<<4)}, {16, 16}, 4},
{{1|(2<<4)}, {32, 16}, 4},
{{1|(3<<4)}, {48, 16}, 4},
{{1|(4<<4)}, {64, 16}, 4},
{{1|(5<<4)}, {80, 16}, 4},
{{1|(6<<4)}, {96, 16}, 4},
{{1|(7<<4)}, {112, 16}, 4},
{{1|(8<<4)}, {128, 16}, 4},
{{1|(9<<4)}, {144, 16}, 4},
{{1|(10<<4)}, {160, 16}, 4},
{{1|(11<<4)}, {176, 16}, 4},
{{1|(12<<4)}, {192, 16}, 4},
{{2|(0<<4)}, {0, 32}, 1},
{{2|(1<<4)}, {16, 32}, 4},
{{2|(2<<4)}, {32, 32}, 4},
{{2|(3<<4)}, {48, 32}, 4},
{{2|(4<<4)}, {64, 32}, 4},
{{2|(5<<4)}, {80, 32}, 4},
{{2|(6<<4)}, {96, 32}, 4},
{{2|(7<<4)}, {112, 32}, 4},
{{2|(8<<4)}, {128, 32}, 4},
{{2|(9<<4)}, {144, 32}, 4},
{{2|(10<<4)}, {160, 32}, 4},
{{2|(11<<4)}, {176, 32}, 4},
{{2|(12<<4)}, {192, 32}, 4},
{{2|(13<<4)}, {224, 32}, 4},
{{3|(0<<4)}, {0, 48}, 1},
{{3|(1<<4)}, {16, 48}, 4},
{{3|(2<<4)}, {32, 48}, 4},
{{3|(3<<4)}, {48, 48}, 4},
{{3|(4<<4)}, {64, 48}, 4},
{{3|(5<<4)}, {80, 48}, 4},
{{3|(6<<4)}, {96, 48}, 4},
{{3|(7<<4)}, {112, 48}, 4},
{{3|(8<<4)}, {128, 48}, 4},
{{3|(9<<4)}, {144, 48}, 4},
{{3|(10<<4)}, {160, 48}, 4},
{{3|(11<<4)}, {176, 48}, 4},
{{3|(13<<4)}, {224, 48}, 1},
{{4|(0<<4)}, {0, 64}, 1},
{{4|(1<<4)}, {16, 64}, 1},
{{4|(2<<4)}, {32, 64}, 1},
{{4|(5<<4)}, {80, 64}, 4},
{{4|(10<<4)}, {160, 64}, 1},
{{4|(11<<4)}, {176, 64}, 1},
{{4|(12<<4)}, {192, 64}, 1},
{{4|(13<<4)}, {224, 64}, 1},
};
void matrix_init_kb(void) {
// put your keyboard start-up code here
// runs once when the firmware starts up
//bootmagic_lite();
matrix_init_user();
}
void matrix_scan_kb(void) {
// put your looping keyboard code here
// runs every cycle (a lot)
matrix_scan_user();
}
bool process_record_kb(uint16_t keycode, keyrecord_t *record) {
// put your per-action keyboard code here
// runs for every action, just before processing by the firmware
return process_record_user(keycode, record);
}
void led_set_kb(uint8_t usb_led) {
// put your keyboard LED indicator (ex: Caps Lock LED) toggling code here
led_set_user(usb_led);
}

54
keyboards/ducky/one2mini/one2mini.h Normal file
View File

@ -0,0 +1,54 @@
/* Copyright 2019 /u/KeepItUnder
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include "quantum.h"
/* This a shortcut to help you visually see your layout.
*
* The first section contains all of the arguments representing the physical
* layout of the board and position of the keys.
*
* The second converts the arguments into a two-dimensional array which
* represents the switch matrix.
*/
#define LAYOUT( \
k00, k01, k02, k03, k04, k05, k06, k07, k08, k09, k0a, k0b, k0c, k0d, k0e, \
k10, k11, k12, k13, k14, k15, k16, k17, k18, k19, k1a, k1b, k1c, k1e, \
k20, k21, k22, k23, k24, k25, k26, k27, k28, k29, k2a, k2b, k2c, k2d, k2e, \
k30, k31, k32, k33, k34, k35, k36, k37, k38, k39, k3a, k3b, k3d, k3e, \
k40, k41, k42, k45, k4a, k4b, k4c, k4d, k4e \
) { \
{ k00, k01, k02, k03, k04, k05, k06, k07, k08, k09, k0a, k0b, k0c, k0d, KC_NO }, \
{ k10, k11, k12, k13, k14, k15, k16, k17, k18, k19, k1a, k1b, k1c, KC_NO, KC_NO }, \
{ k20, k21, k22, k23, k24, k25, k26, k27, k28, k29, k2a, k2b, k2c, k2d, KC_NO }, \
{ k30, k31, k32, k33, k34, k35, k36, k37, k38, k39, k3a, k3b, KC_NO, k3d, KC_NO }, \
{ k40, k41, k42, KC_NO, KC_NO, k45, KC_NO, KC_NO, KC_NO, KC_NO, k4a, k4b, k4c, k4d, KC_NO } \
}
#define LAYOUT_ISO( \
k00, k01, k02, k03, k04, k05, k06, k07, k08, k09, k0a, k0b, k0c, k0d, k0e, \
k10, k11, k12, k13, k14, k15, k16, k17, k18, k19, k1a, k1b, k1c, k1e, \
k20, k21, k22, k23, k24, k25, k26, k27, k28, k29, k2a, k2b, k2c, k2d, k2e, \
k30, k31, k32, k33, k34, k35, k36, k37, k38, k39, k3a, k3b, k3d, k3e, \
k40, k41, k42, k45, k4a, k4b, k4c, k4d, k4e \
) { \
{ k00, k01, k02, k03, k04, k05, k06, k07, k08, k09, k0a, k0b, k0c, k0d, KC_NO }, \
{ k10, k11, k12, k13, k14, k15, k16, k17, k18, k19, k1a, k1b, k1c, KC_NO, KC_NO }, \
{ k20, k21, k22, k23, k24, k25, k26, k27, k28, k29, k2a, k2b, k2c, k2d, KC_NO }, \
{ k30, k31, k32, k33, k34, k35, k36, k37, k38, k39, k3a, k3b, KC_NO, k3d, KC_NO }, \
{ k40, k41, k42, KC_NO, KC_NO, k45, KC_NO, KC_NO, KC_NO, KC_NO, k4a, k4b, k4c, k4d, KC_NO } \
}

15
keyboards/ducky/one2mini/readme.md Normal file
View File

@ -0,0 +1,15 @@
# one2mini
![one2mini](http://www.duckychannel.com.tw/page-en/One_2_Mini_RGB/images/One2_Mini_01_02.jpg)
A short description of the keyboard/project
Keyboard Maintainer: [/u/KeepItUnder](https://github.com/GitWellBack)
Hardware Supported: Ducky One 2 Mini RGB/ NUC123SD4AN0 / MBI5042GP
Hardware Availability: http://www.duckychannel.com.tw/page-en/One_2_Mini_RGB/
Make example for this keyboard (after setting up your build environment):
make one2mini:default
See the [build environment setup](https://docs.qmk.fm/#/getting_started_build_tools) and the [make instructions](https://docs.qmk.fm/#/getting_started_make_guide) for more information. Brand new to QMK? Start with our [Complete Newbs Guide](https://docs.qmk.fm/#/newbs).

106
keyboards/ducky/one2mini/rules.mk Normal file
View File

@ -0,0 +1,106 @@
SRC += matrix.c
# MCU name
#MCU = at90usb1286
MCU_FAMILY = NUMICRO
MCU_SERIES = NUC123SD4AN0
# linker script to use
# it should exist either in <chibios>/os/common/ports/ARMCMx/compilers/GCC/ld/
# or <this_dir>/ld/
MCU_LDSCRIPT = NUC123SD4AN0
# startup code to use
# is should exist in <chibios>/os/common/ports/ARMCMx/compilers/GCC/mk/
MCU_STARTUP = NUC123SD4AN0
# it should exist either in <chibios>/os/hal/boards/
# or <this_dir>/boards
BOARD = NUC123SD4AN0
# NUC123 series is Cortex M0
MCU = cortex-m0
# ARM version, CORTEX-M0/M1 are 6, CORTEX-M3/M4/M7 are 7
ARMV = 6
# Processor frequency.
# This will define a symbol, F_CPU, in all source code files equal to the
# processor frequency in Hz. You can then use this symbol in your source code to
# calculate timings. Do NOT tack on a 'UL' at the end, this will be done
# automatically to create a 32-bit value in your source code.
#
# This will be an integer division of F_USB below, as it is sourced by
# F_USB after it has run through any CPU prescalers. Note that this value
# does not *change* the processor frequency - it should merely be updated to
# reflect the processor speed set externally so that the code can use accurate
# software delays.
F_CPU = 72000000
#
# LUFA specific
#
# Target architecture (see library "Board Types" documentation).
#ARCH = ARM
# Input clock frequency.
# This will define a symbol, F_USB, in all source code files equal to the
# input clock frequency (before any prescaling is performed) in Hz. This value may
# differ from F_CPU if prescaling is used on the latter, and is required as the
# raw input clock is fed directly to the PLL sections of the AVR for high speed
# clock generation for the USB and other AVR subsections. Do NOT tack on a 'UL'
# at the end, this will be done automatically to create a 32-bit value in your
# source code.
#
# If no clock division is performed on the input clock inside the AVR (via the
# CPU clock adjust registers or the clock division fuses), this will be equal to F_CPU.
F_USB = $(F_CPU/4)
# Interrupt driven control endpoint task(+60)
OPT_DEFS += -DINTERRUPT_CONTROL_ENDPOINT
# Bootloader selection
# Teensy halfkay
# Pro Micro caterina
# Atmel DFU atmel-dfu
# LUFA DFU lufa-dfu
# QMK DFU qmk-dfu
# atmega32a bootloadHID
#BOOTLOADER = QMK-dfu
# If you don't know the bootloader type, then you can specify the
# Boot Section Size in *bytes* by uncommenting out the OPT_DEFS line
# Teensy halfKay 512
# Teensy++ halfKay 1024
# Atmel DFU loader 4096
# LUFA bootloader 4096
# USBaspLoader 2048
# OPT_DEFS += -DBOOTLOADER_SIZE=4096
OPT_DEFS += -DBOOTLOADER_SIZE=4096
# Build Options
# change yes to no to disable
#
BOOTMAGIC_ENABLE = no # Virtual DIP switch configuration(+1000)
MOUSEKEY_ENABLE = yes # Mouse keys(+4700)
EXTRAKEY_ENABLE = yes # Audio control and System control(+450)
CONSOLE_ENABLE = no # Console for debug(+400)
COMMAND_ENABLE = no # Commands for debug and configuration
# Do not enable SLEEP_LED_ENABLE. it uses the same timer as BACKLIGHT_ENABLE
SLEEP_LED_ENABLE = no # Breathing sleep LED during USB suspend
# if this doesn't work, see here: https://github.com/tmk/tmk_keyboard/wiki/FAQ#nkro-doesnt-work
NKRO_ENABLE = yes # USB Nkey Rollover
BACKLIGHT_ENABLE = no # Enable keyboard backlight functionality on B7 by default
RGBLIGHT_ENABLE = no # Enable keyboard RGB underglow
MIDI_ENABLE = no # MIDI support (+2400 to 4200, depending on config)
UNICODE_ENABLE = no # Unicode
BLUETOOTH_ENABLE = no # Enable Bluetooth with the Adafruit EZ-Key HID
AUDIO_ENABLE = no # Audio output on port C6
FAUXCLICKY_ENABLE = no # Use buzzer to emulate clicky switches
HD44780_ENABLE = no # Enable support for HD44780 based LCDs (+400)
#WAIT_FOR_USB = no # Don't wait for USB driver to initialise
RGB_MATRIX_ENABLE = MBI5042 # Use Macroblock PWM LED driver
CUSTOM_MATRIX = yes # Custom keyscan matrix (don't force inputs)