mirror of
https://github.com/qmk/qmk_firmware.git
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update twi2c to do standard master stuff
This commit is contained in:
Jack Humbert
parent
5fad8d774d
commit
161c68b48a
242
drivers/arm/is31fl3731.c
Normal file
242
drivers/arm/is31fl3731.c
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@ -0,0 +1,242 @@
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/* Copyright 2017 Jason Williams
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* Copyright 2018 Jack Humbert
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "is31fl3731.h"
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#include <util/delay.h>
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#include <string.h>
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#include "twi2c.h"
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#include "progmem.h"
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// This is a 7-bit address, that gets left-shifted and bit 0
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// set to 0 for write, 1 for read (as per I2C protocol)
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// The address will vary depending on your wiring:
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// 0b1110100 AD <-> GND
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// 0b1110111 AD <-> VCC
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// 0b1110101 AD <-> SCL
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// 0b1110110 AD <-> SDA
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#define ISSI_ADDR_DEFAULT 0x74
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#define ISSI_REG_CONFIG 0x00
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#define ISSI_REG_CONFIG_PICTUREMODE 0x00
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#define ISSI_REG_CONFIG_AUTOPLAYMODE 0x08
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#define ISSI_REG_CONFIG_AUDIOPLAYMODE 0x18
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#define ISSI_CONF_PICTUREMODE 0x00
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#define ISSI_CONF_AUTOFRAMEMODE 0x04
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#define ISSI_CONF_AUDIOMODE 0x08
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#define ISSI_REG_PICTUREFRAME 0x01
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#define ISSI_REG_SHUTDOWN 0x0A
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#define ISSI_REG_AUDIOSYNC 0x06
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#define ISSI_COMMANDREGISTER 0xFD
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#define ISSI_BANK_FUNCTIONREG 0x0B // helpfully called 'page nine'
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// Transfer buffer for TWITransmitData()
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uint8_t g_twi_transfer_buffer[20];
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// These buffers match the IS31FL3731 PWM registers 0x24-0xB3.
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// Storing them like this is optimal for I2C transfers to the registers.
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// We could optimize this and take out the unused registers from these
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// buffers and the transfers in IS31FL3731_write_pwm_buffer() but it's
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// probably not worth the extra complexity.
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uint8_t g_pwm_buffer[DRIVER_COUNT][144];
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bool g_pwm_buffer_update_required = false;
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uint8_t g_led_control_registers[DRIVER_COUNT][18] = { { 0 }, { 0 } };
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bool g_led_control_registers_update_required = false;
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// This is the bit pattern in the LED control registers
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// (for matrix A, add one to register for matrix B)
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//
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// reg - b7 b6 b5 b4 b3 b2 b1 b0
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// 0x00 - R08,R07,R06,R05,R04,R03,R02,R01
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// 0x02 - G08,G07,G06,G05,G04,G03,G02,R00
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// 0x04 - B08,B07,B06,B05,B04,B03,G01,G00
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// 0x06 - - , - , - , - , - ,B02,B01,B00
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// 0x08 - - , - , - , - , - , - , - , -
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// 0x0A - B17,B16,B15, - , - , - , - , -
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// 0x0C - G17,G16,B14,B13,B12,B11,B10,B09
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// 0x0E - R17,G15,G14,G13,G12,G11,G10,G09
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// 0x10 - R16,R15,R14,R13,R12,R11,R10,R09
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void IS31FL3731_write_register( uint8_t addr, uint8_t reg, uint8_t data )
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{
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g_twi_transfer_buffer[0] = reg;
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g_twi_transfer_buffer[1] = data;
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//Transmit data until succesful
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while(twi2c_transmit(addr << 1, g_twi_transfer_buffer,2) != 0);
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}
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void IS31FL3731_write_pwm_buffer( uint8_t addr, uint8_t *pwm_buffer )
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{
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// assumes bank is already selected
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// transmit PWM registers in 9 transfers of 16 bytes
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// g_twi_transfer_buffer[] is 20 bytes
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// iterate over the pwm_buffer contents at 16 byte intervals
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for ( int i = 0; i < 144; i += 16 )
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{
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// set the first register, e.g. 0x24, 0x34, 0x44, etc.
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g_twi_transfer_buffer[0] = 0x24 + i;
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// copy the data from i to i+15
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// device will auto-increment register for data after the first byte
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// thus this sets registers 0x24-0x33, 0x34-0x43, etc. in one transfer
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for ( int j = 0; j < 16; j++ )
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{
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g_twi_transfer_buffer[1 + j] = pwm_buffer[i + j];
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}
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//Transmit buffer until succesful
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while(twi2c_transmit(addr << 1, g_twi_transfer_buffer,17) != 0);
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}
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}
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void IS31FL3731_init( uint8_t addr )
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{
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// In order to avoid the LEDs being driven with garbage data
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// in the LED driver's PWM registers, first enable software shutdown,
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// then set up the mode and other settings, clear the PWM registers,
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// then disable software shutdown.
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// select "function register" bank
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IS31FL3731_write_register( addr, ISSI_COMMANDREGISTER, ISSI_BANK_FUNCTIONREG );
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// enable software shutdown
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IS31FL3731_write_register( addr, ISSI_REG_SHUTDOWN, 0x00 );
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// this delay was copied from other drivers, might not be needed
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_delay_ms( 10 );
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// picture mode
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IS31FL3731_write_register( addr, ISSI_REG_CONFIG, ISSI_REG_CONFIG_PICTUREMODE );
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// display frame 0
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IS31FL3731_write_register( addr, ISSI_REG_PICTUREFRAME, 0x00 );
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// audio sync off
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IS31FL3731_write_register( addr, ISSI_REG_AUDIOSYNC, 0x00 );
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// select bank 0
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IS31FL3731_write_register( addr, ISSI_COMMANDREGISTER, 0 );
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// turn off all LEDs in the LED control register
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for ( int i = 0x00; i <= 0x11; i++ )
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{
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IS31FL3731_write_register( addr, i, 0x00 );
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}
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// turn off all LEDs in the blink control register (not really needed)
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for ( int i = 0x12; i <= 0x23; i++ )
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{
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IS31FL3731_write_register( addr, i, 0x00 );
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}
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// set PWM on all LEDs to 0
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for ( int i = 0x24; i <= 0xB3; i++ )
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{
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IS31FL3731_write_register( addr, i, 0x00 );
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}
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// select "function register" bank
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IS31FL3731_write_register( addr, ISSI_COMMANDREGISTER, ISSI_BANK_FUNCTIONREG );
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// disable software shutdown
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IS31FL3731_write_register( addr, ISSI_REG_SHUTDOWN, 0x01 );
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// select bank 0 and leave it selected.
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// most usage after initialization is just writing PWM buffers in bank 0
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// as there's not much point in double-buffering
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IS31FL3731_write_register( addr, ISSI_COMMANDREGISTER, 0 );
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}
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void IS31FL3731_set_color( int index, uint8_t red, uint8_t green, uint8_t blue )
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{
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if ( index >= 0 && index < DRIVER_LED_TOTAL ) {
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is31_led led = g_is31_leds[index];
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// Subtract 0x24 to get the second index of g_pwm_buffer
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g_pwm_buffer[led.driver][led.r - 0x24] = red;
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g_pwm_buffer[led.driver][led.g - 0x24] = green;
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g_pwm_buffer[led.driver][led.b - 0x24] = blue;
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g_pwm_buffer_update_required = true;
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}
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}
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void IS31FL3731_set_color_all( uint8_t red, uint8_t green, uint8_t blue )
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{
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for ( int i = 0; i < DRIVER_LED_TOTAL; i++ )
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{
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IS31FL3731_set_color( i, red, green, blue );
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}
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}
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void IS31FL3731_set_led_control_register( uint8_t index, bool red, bool green, bool blue )
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{
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is31_led led = g_is31_leds[index];
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uint8_t control_register_r = (led.r - 0x24) / 8;
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uint8_t control_register_g = (led.g - 0x24) / 8;
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uint8_t control_register_b = (led.b - 0x24) / 8;
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uint8_t bit_r = (led.r - 0x24) % 8;
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uint8_t bit_g = (led.g - 0x24) % 8;
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uint8_t bit_b = (led.b - 0x24) % 8;
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if ( red ) {
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g_led_control_registers[led.driver][control_register_r] |= (1 << bit_r);
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} else {
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g_led_control_registers[led.driver][control_register_r] &= ~(1 << bit_r);
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}
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if ( green ) {
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g_led_control_registers[led.driver][control_register_g] |= (1 << bit_g);
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} else {
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g_led_control_registers[led.driver][control_register_g] &= ~(1 << bit_g);
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}
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if ( blue ) {
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g_led_control_registers[led.driver][control_register_b] |= (1 << bit_b);
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} else {
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g_led_control_registers[led.driver][control_register_b] &= ~(1 << bit_b);
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}
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g_led_control_registers_update_required = true;
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}
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void IS31FL3731_update_pwm_buffers( uint8_t addr1, uint8_t addr2 )
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{
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if ( g_pwm_buffer_update_required )
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{
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IS31FL3731_write_pwm_buffer( addr1, g_pwm_buffer[0] );
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IS31FL3731_write_pwm_buffer( addr2, g_pwm_buffer[1] );
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}
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g_pwm_buffer_update_required = false;
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}
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void IS31FL3731_update_led_control_registers( uint8_t addr1, uint8_t addr2 )
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{
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if ( g_led_control_registers_update_required )
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{
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for ( int i=0; i<18; i++ )
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{
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IS31FL3731_write_register(addr1, i, g_led_control_registers[0][i] );
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IS31FL3731_write_register(addr2, i, g_led_control_registers[1][i] );
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}
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}
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}
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214
drivers/arm/is31fl3731.h
Normal file
214
drivers/arm/is31fl3731.h
Normal file
@ -0,0 +1,214 @@
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/* Copyright 2017 Jason Williams
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* Copyright 2018 Jack Humbert
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef IS31FL3731_DRIVER_H
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#define IS31FL3731_DRIVER_H
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#include <stdint.h>
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#include <stdbool.h>
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typedef struct is31_led {
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uint8_t driver:2;
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uint8_t r;
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uint8_t g;
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uint8_t b;
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} __attribute__((packed)) is31_led;
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extern const is31_led g_is31_leds[DRIVER_LED_TOTAL];
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void IS31FL3731_init( uint8_t addr );
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void IS31FL3731_write_register( uint8_t addr, uint8_t reg, uint8_t data );
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void IS31FL3731_write_pwm_buffer( uint8_t addr, uint8_t *pwm_buffer );
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void IS31FL3731_set_color( int index, uint8_t red, uint8_t green, uint8_t blue );
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void IS31FL3731_set_color_all( uint8_t red, uint8_t green, uint8_t blue );
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void IS31FL3731_set_led_control_register( uint8_t index, bool red, bool green, bool blue );
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// This should not be called from an interrupt
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// (eg. from a timer interrupt).
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// Call this while idle (in between matrix scans).
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// If the buffer is dirty, it will update the driver with the buffer.
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void IS31FL3731_update_pwm_buffers( uint8_t addr1, uint8_t addr2 );
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void IS31FL3731_update_led_control_registers( uint8_t addr1, uint8_t addr2 );
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#define C1_1 0x24
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#define C1_2 0x25
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#define C1_3 0x26
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#define C1_4 0x27
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#define C1_5 0x28
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#define C1_6 0x29
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#define C1_7 0x2A
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#define C1_8 0x2B
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#define C1_9 0x2C
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#define C1_10 0x2D
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#define C1_11 0x2E
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#define C1_12 0x2F
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#define C1_13 0x30
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#define C1_14 0x31
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#define C1_15 0x32
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#define C1_16 0x33
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#define C2_1 0x34
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#define C2_2 0x35
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#define C2_3 0x36
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#define C2_4 0x37
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#define C2_5 0x38
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#define C2_6 0x39
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#define C2_7 0x3A
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#define C2_8 0x3B
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#define C2_9 0x3C
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#define C2_10 0x3D
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#define C2_11 0x3E
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#define C2_12 0x3F
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#define C2_13 0x40
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#define C2_14 0x41
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#define C2_15 0x42
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#define C2_16 0x43
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#define C3_1 0x44
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#define C3_2 0x45
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#define C3_3 0x46
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#define C3_4 0x47
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#define C3_5 0x48
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#define C3_6 0x49
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#define C3_7 0x4A
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#define C3_8 0x4B
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#define C3_9 0x4C
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#define C3_10 0x4D
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#define C3_11 0x4E
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#define C3_12 0x4F
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#define C3_13 0x50
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#define C3_14 0x51
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#define C3_15 0x52
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#define C3_16 0x53
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#define C4_1 0x54
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#define C4_2 0x55
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#define C4_3 0x56
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#define C4_4 0x57
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#define C4_5 0x58
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#define C4_6 0x59
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#define C4_7 0x5A
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#define C4_8 0x5B
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#define C4_9 0x5C
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#define C4_10 0x5D
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#define C4_11 0x5E
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#define C4_12 0x5F
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#define C4_13 0x60
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#define C4_14 0x61
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#define C4_15 0x62
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#define C4_16 0x63
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#define C5_1 0x64
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#define C5_2 0x65
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#define C5_3 0x66
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#define C5_4 0x67
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#define C5_5 0x68
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#define C5_6 0x69
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#define C5_7 0x6A
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#define C5_8 0x6B
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#define C5_9 0x6C
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#define C5_10 0x6D
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#define C5_11 0x6E
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#define C5_12 0x6F
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#define C5_13 0x70
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#define C5_14 0x71
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#define C5_15 0x72
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#define C5_16 0x73
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#define C6_1 0x74
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#define C6_2 0x75
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#define C6_3 0x76
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#define C6_4 0x77
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#define C6_5 0x78
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#define C6_6 0x79
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#define C6_7 0x7A
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#define C6_8 0x7B
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#define C6_9 0x7C
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#define C6_10 0x7D
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#define C6_11 0x7E
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#define C6_12 0x7F
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#define C6_13 0x80
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#define C6_14 0x81
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#define C6_15 0x82
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#define C6_16 0x83
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#define C7_1 0x84
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#define C7_2 0x85
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#define C7_3 0x86
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#define C7_4 0x87
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#define C7_5 0x88
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#define C7_6 0x89
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#define C7_7 0x8A
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#define C7_8 0x8B
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#define C7_9 0x8C
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#define C7_10 0x8D
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#define C7_11 0x8E
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#define C7_12 0x8F
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#define C7_13 0x90
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#define C7_14 0x91
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#define C7_15 0x92
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#define C7_16 0x93
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#define C8_1 0x94
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#define C8_2 0x95
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#define C8_3 0x96
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#define C8_4 0x97
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||||
#define C8_5 0x98
|
||||
#define C8_6 0x99
|
||||
#define C8_7 0x9A
|
||||
#define C8_8 0x9B
|
||||
|
||||
#define C8_9 0x9C
|
||||
#define C8_10 0x9D
|
||||
#define C8_11 0x9E
|
||||
#define C8_12 0x9F
|
||||
#define C8_13 0xA0
|
||||
#define C8_14 0xA1
|
||||
#define C8_15 0xA2
|
||||
#define C8_16 0xA3
|
||||
|
||||
#define C9_1 0xA4
|
||||
#define C9_2 0xA5
|
||||
#define C9_3 0xA6
|
||||
#define C9_4 0xA7
|
||||
#define C9_5 0xA8
|
||||
#define C9_6 0xA9
|
||||
#define C9_7 0xAA
|
||||
#define C9_8 0xAB
|
||||
|
||||
#define C9_9 0xAC
|
||||
#define C9_10 0xAD
|
||||
#define C9_11 0xAE
|
||||
#define C9_12 0xAF
|
||||
#define C9_13 0xB0
|
||||
#define C9_14 0xB1
|
||||
#define C9_15 0xB2
|
||||
#define C9_16 0xB3
|
||||
|
||||
|
||||
|
||||
#endif // IS31FL3731_DRIVER_H
|
||||
@ -39,7 +39,9 @@
|
||||
|
||||
I2CSlaveMsgCB twi2c_slave_message_process, catchError, clearAfterSend;
|
||||
|
||||
static const I2CConfig slaveI2CConfig = {
|
||||
static uint8_t twi2c_address;
|
||||
|
||||
static const I2CConfig I2CConfig = {
|
||||
STM32_TIMINGR_PRESC(15U) |
|
||||
STM32_TIMINGR_SCLDEL(4U) | STM32_TIMINGR_SDADEL(2U) |
|
||||
STM32_TIMINGR_SCLH(15U) | STM32_TIMINGR_SCLL(21U),
|
||||
@ -166,15 +168,10 @@ void clearAfterSend(I2CDriver *i2cp)
|
||||
|
||||
void twi2c_slave_init(void) {
|
||||
|
||||
palSetGroupMode(GPIOB,8,9, PAL_MODE_INPUT); // Try releasing special pins for a short time
|
||||
chThdSleepMilliseconds(10);
|
||||
|
||||
/* I2C1 SCL on PF1, SDA on PF0 */
|
||||
palSetPadMode(GPIOB, 9, PAL_MODE_ALTERNATE(4) | PAL_STM32_OTYPE_OPENDRAIN | PAL_STM32_PUPDR_PULLUP);
|
||||
palSetPadMode(GPIOB, 8, PAL_MODE_ALTERNATE(4) | PAL_STM32_OTYPE_OPENDRAIN | PAL_STM32_PUPDR_PULLUP);
|
||||
twi2c_init();
|
||||
|
||||
|
||||
i2cStart(&I2C_DRIVER, &slaveI2CConfig);
|
||||
i2cStart(&I2C_DRIVER, &I2CConfig);
|
||||
#if HAL_USE_I2C_SLAVE
|
||||
I2C_DRIVER.slaveTimeout = MS2ST(100); // Time for complete message
|
||||
#endif
|
||||
@ -201,19 +198,31 @@ void twi2c_slave_task(void) {
|
||||
}
|
||||
}
|
||||
|
||||
void twi2c_master_init(void) {
|
||||
uint8_t twi2c_start(uint8_t address) {
|
||||
twi2c_address = address;
|
||||
i2cStart(&I2C_DRIVER, &I2CConfig);
|
||||
}
|
||||
|
||||
void twi2c_init(void) {
|
||||
palSetGroupMode(GPIOB,8,9, PAL_MODE_INPUT); // Try releasing special pins for a short time
|
||||
chThdSleepMilliseconds(10);
|
||||
|
||||
palSetPadMode(GPIOB, 9, PAL_MODE_ALTERNATE(4) | PAL_STM32_OTYPE_OPENDRAIN | PAL_STM32_PUPDR_PULLUP);
|
||||
palSetPadMode(GPIOB, 8, PAL_MODE_ALTERNATE(4) | PAL_STM32_OTYPE_OPENDRAIN | PAL_STM32_PUPDR_PULLUP);
|
||||
|
||||
i2cStart(&I2C_DRIVER, &slaveI2CConfig);
|
||||
|
||||
// try high drive (from kiibohd)
|
||||
// I2C_DRIVER.i2c->C2 |= I2Cx_C2_HDRS;
|
||||
// try glitch fixing (from kiibohd)
|
||||
// I2C_DRIVER.i2c->FLT = 4;
|
||||
|
||||
}
|
||||
|
||||
uint8_t twi2c_write(uint8_t data) {
|
||||
uint8_t buffer[1] = {0};
|
||||
return i2cMasterTransmitTimeout(&I2C_DRIVER, twi2c_address/2, &data, 1, buffer, 1, MS2ST(100));
|
||||
}
|
||||
|
||||
uint8_t twi2c_transmit(uint8_t address, uint8_t* data, uint16_t length) {
|
||||
twi2c_address = address;
|
||||
i2cStart(&I2C_DRIVER, &I2CConfig);
|
||||
return i2cMasterTransmitTimeout(&I2C_DRIVER, twi2c_address/2, data, length, buffer, 1, MS2ST(100));
|
||||
}
|
||||
|
||||
@ -28,4 +28,13 @@ I2CSlaveMsgCB twi2c_slave_message_process, catchError, clearAfterSend;
|
||||
|
||||
void twi2c_slave_init(void);
|
||||
|
||||
void twi2c_master_init(void);
|
||||
void twi2c_init(void);
|
||||
uint8_t twi2c_start(uint8_t address);
|
||||
uint8_t twi2c_write(uint8_t data);
|
||||
uint8_t twi2c_read_ack(void);
|
||||
uint8_t twi2c_read_nack(void);
|
||||
uint8_t twi2c_transmit(uint8_t address, uint8_t* data, uint16_t length);
|
||||
uint8_t twi2c_receive(uint8_t address, uint8_t* data, uint16_t length);
|
||||
uint8_t twi2c_writeReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length);
|
||||
uint8_t twi2c_readReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length);
|
||||
void twi2c_stop(void);
|
||||
|
||||
@ -59,7 +59,7 @@ void matrix_init(void) {
|
||||
master = right_hand;
|
||||
|
||||
if (master) {
|
||||
twi2c_master_init();
|
||||
twi2c_init();
|
||||
} else {
|
||||
twi2c_slave_init();
|
||||
}
|
||||
|
||||
@ -1 +1 @@
|
||||
Subproject commit f9643c88ad5cd0704d57bed83fe64f45b3e6be4e
|
||||
Subproject commit 587968d6cbc2b0e1c7147540872f2a67e59ca18b
|
||||
Loading…
Reference in New Issue
Block a user