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more fixes

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This commit is contained in:
bwisn 2021-11-01 07:54:07 +01:00
parent 6f89eeea6b
commit 0e1449c458
8 changed files with 100 additions and 178 deletions
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2
keyboards/annepro2/annepro2.c
View File

@ -56,7 +56,7 @@ void bootloader_jump(void) {
NVIC_SystemReset(); NVIC_SystemReset();
} }
void keyboard_pre_init_kb(void) { void keyboard_pre_init_user(void) {
#if HAL_USE_SPI == TRUE #if HAL_USE_SPI == TRUE
spi_init(); spi_init();
#endif #endif

186
keyboards/annepro2/boards/ANNEPRO2_C15/board.c
View File

@ -24,65 +24,17 @@
/* ============ Function Prototypes ================== */ /* ============ Function Prototypes ================== */
#define PBIT(PORT, LINE) ((PAL_PORT(LINE) == PORT) ? (1 << PAL_PAD(LINE)) : 0) #define PBIT(PORT, LINE) ((PAL_PORT(LINE) == PORT) ? (1 << PAL_PAD(LINE)) : 0)
#define PAFIO_L(PORT, LINE, AF) (((PAL_PORT(LINE) == PORT) && (PAL_PAD(LINE) < 8)) ? (AF << (PAL_PAD(LINE) << 2)) : 0) #define PAFIO_L(PORT, LINE, AF) (((PAL_PORT(LINE) == PORT) && (PAL_PAD(LINE) < 8)) ? (AF << (PAL_PAD(LINE) << 2)) : 0)
#define PAFIO_H(PORT, LINE, AF) (((PAL_PORT(LINE) == PORT) && (PAL_PAD(LINE) >= 8)) ? (AF << ((PAL_PAD(LINE) - 8) << 2)) : 0) #define PAFIO_H(PORT, LINE, AF) (((PAL_PORT(LINE) == PORT) && (PAL_PAD(LINE) >= 8)) ? (AF << ((PAL_PAD(LINE) - 8) << 2)) : 0)
#define PAFIO(PORT, N, LINE, AF) ((N) ? PAFIO_H(PORT, LINE, AF) : PAFIO_L(PORT, LINE, AF)) #define PAFIO(PORT, N, LINE, AF) ((N) ? PAFIO_H(PORT, LINE, AF) : PAFIO_L(PORT, LINE, AF))
#define OUT_BITS(PORT) (\ #define OUT_BITS(PORT) (PBIT(PORT, LINE_ROW1) | PBIT(PORT, LINE_ROW2) | PBIT(PORT, LINE_ROW3) | PBIT(PORT, LINE_ROW4) | PBIT(PORT, LINE_ROW5) | 0)
PBIT(PORT, LINE_ROW1 ) | \
PBIT(PORT, LINE_ROW2 ) | \
PBIT(PORT, LINE_ROW3 ) | \
PBIT(PORT, LINE_ROW4 ) | \
PBIT(PORT, LINE_ROW5 ) | \
0)
#define IN_BITS(PORT) (\ #define IN_BITS(PORT) (PBIT(PORT, LINE_COL1) | PBIT(PORT, LINE_COL2) | PBIT(PORT, LINE_COL3) | PBIT(PORT, LINE_COL4) | PBIT(PORT, LINE_COL5) | PBIT(PORT, LINE_COL6) | PBIT(PORT, LINE_COL7) | PBIT(PORT, LINE_COL8) | PBIT(PORT, LINE_COL9) | PBIT(PORT, LINE_COL10) | PBIT(PORT, LINE_COL11) | PBIT(PORT, LINE_COL12) | PBIT(PORT, LINE_COL13) | PBIT(PORT, LINE_COL14) | 0)
PBIT(PORT, LINE_COL1) | \
PBIT(PORT, LINE_COL2) | \
PBIT(PORT, LINE_COL3) | \
PBIT(PORT, LINE_COL4) | \
PBIT(PORT, LINE_COL5) | \
PBIT(PORT, LINE_COL6) | \
PBIT(PORT, LINE_COL7) | \
PBIT(PORT, LINE_COL8) | \
PBIT(PORT, LINE_COL9) | \
PBIT(PORT, LINE_COL10)| \
PBIT(PORT, LINE_COL11)| \
PBIT(PORT, LINE_COL12)| \
PBIT(PORT, LINE_COL13)| \
PBIT(PORT, LINE_COL14)| \
0)
// Alternate Functions // Alternate Functions
#define AF_BITS(PORT, N) (\ #define AF_BITS(PORT, N) (PAFIO(PORT, N, LINE_UART_RX, AFIO_USART) | PAFIO(PORT, N, LINE_UART_TX, AFIO_USART) | PAFIO(PORT, N, LINE_BT_UART_TX, AFIO_USART) | PAFIO(PORT, N, LINE_BT_UART_RX, AFIO_USART) | PAFIO(PORT, N, LINE_ROW1, AFIO_GPIO) | PAFIO(PORT, N, LINE_ROW2, AFIO_GPIO) | PAFIO(PORT, N, LINE_ROW3, AFIO_GPIO) | PAFIO(PORT, N, LINE_ROW4, AFIO_GPIO) | PAFIO(PORT, N, LINE_ROW5, AFIO_GPIO) | PAFIO(PORT, N, LINE_COL1, AFIO_GPIO) | PAFIO(PORT, N, LINE_COL2, AFIO_GPIO) | PAFIO(PORT, N, LINE_COL3, AFIO_GPIO) | PAFIO(PORT, N, LINE_COL4, AFIO_GPIO) | PAFIO(PORT, N, LINE_COL5, AFIO_GPIO) | PAFIO(PORT, N, LINE_COL6, AFIO_GPIO) | PAFIO(PORT, N, LINE_COL7, AFIO_GPIO) | PAFIO(PORT, N, LINE_COL8, AFIO_GPIO) | PAFIO(PORT, N, LINE_COL9, AFIO_GPIO) | PAFIO(PORT, N, LINE_COL10, AFIO_GPIO) | PAFIO(PORT, N, LINE_COL11, AFIO_GPIO) | PAFIO(PORT, N, LINE_COL12, AFIO_GPIO) | PAFIO(PORT, N, LINE_COL13, AFIO_GPIO) | PAFIO(PORT, N, LINE_COL14, AFIO_GPIO) | 0)
PAFIO(PORT, N, LINE_UART_RX, AFIO_USART)| \
PAFIO(PORT, N, LINE_UART_TX, AFIO_USART)| \
PAFIO(PORT, N, LINE_BT_UART_TX, AFIO_USART)| \
PAFIO(PORT, N, LINE_BT_UART_RX, AFIO_USART)| \
PAFIO(PORT, N, LINE_ROW1, AFIO_GPIO) | \
PAFIO(PORT, N, LINE_ROW2, AFIO_GPIO) | \
PAFIO(PORT, N, LINE_ROW3, AFIO_GPIO) | \
PAFIO(PORT, N, LINE_ROW4, AFIO_GPIO) | \
PAFIO(PORT, N, LINE_ROW5, AFIO_GPIO) | \
PAFIO(PORT, N, LINE_COL1, AFIO_GPIO) | \
PAFIO(PORT, N, LINE_COL2, AFIO_GPIO) | \
PAFIO(PORT, N, LINE_COL3, AFIO_GPIO) | \
PAFIO(PORT, N, LINE_COL4, AFIO_GPIO) | \
PAFIO(PORT, N, LINE_COL5, AFIO_GPIO) | \
PAFIO(PORT, N, LINE_COL6, AFIO_GPIO) | \
PAFIO(PORT, N, LINE_COL7, AFIO_GPIO) | \
PAFIO(PORT, N, LINE_COL8, AFIO_GPIO) | \
PAFIO(PORT, N, LINE_COL9, AFIO_GPIO) | \
PAFIO(PORT, N, LINE_COL10, AFIO_GPIO) | \
PAFIO(PORT, N, LINE_COL11, AFIO_GPIO) | \
PAFIO(PORT, N, LINE_COL12, AFIO_GPIO) | \
PAFIO(PORT, N, LINE_COL13, AFIO_GPIO) | \
PAFIO(PORT, N, LINE_COL14, AFIO_GPIO) | \
0)
/** /**
* @brief PAL setup. * @brief PAL setup.
@ -91,89 +43,77 @@
*/ */
const PALConfig pal_default_config = { const PALConfig pal_default_config = {
// GPIO A // GPIO A
.setup[0] = { .setup[0] =
.DIR = OUT_BITS(IOPORTA), {
.INE = IN_BITS(IOPORTA), .DIR = OUT_BITS(IOPORTA),
.PU = IN_BITS(IOPORTA), .INE = IN_BITS(IOPORTA),
.PD = 0x0000, .PU = IN_BITS(IOPORTA),
.OD = 0x0000, .PD = 0x0000,
.DRV = 0x0000, .OD = 0x0000,
.LOCK = 0x0000, .DRV = 0x0000,
.OUT = 0x0000, .LOCK = 0x0000,
.CFG[0] = AF_BITS(IOPORTA, 0), .OUT = 0x0000,
.CFG[1] = AF_BITS(IOPORTA, 1), .CFG[0] = AF_BITS(IOPORTA, 0),
}, .CFG[1] = AF_BITS(IOPORTA, 1),
},
// GPIO B // GPIO B
.setup[1] = { .setup[1] =
.DIR = OUT_BITS(IOPORTB), {
.INE = IN_BITS(IOPORTB), .DIR = OUT_BITS(IOPORTB),
.PU = IN_BITS(IOPORTB), .INE = IN_BITS(IOPORTB),
.PD = 0x0000, .PU = IN_BITS(IOPORTB),
.OD = 0x0000, .PD = 0x0000,
.DRV = 0x0000, .OD = 0x0000,
.LOCK = 0x0000, .DRV = 0x0000,
.OUT = 0x0000, .LOCK = 0x0000,
.CFG[0] = AF_BITS(IOPORTB, 0), .OUT = 0x0000,
.CFG[1] = AF_BITS(IOPORTB, 1), .CFG[0] = AF_BITS(IOPORTB, 0),
}, .CFG[1] = AF_BITS(IOPORTB, 1),
},
// GPIO C // GPIO C
.setup[2] = { .setup[2] =
.DIR = OUT_BITS(IOPORTC), {
.INE = IN_BITS(IOPORTC), .DIR = OUT_BITS(IOPORTC),
.PU = IN_BITS(IOPORTC), .INE = IN_BITS(IOPORTC),
.PD = 0x0000, .PU = IN_BITS(IOPORTC),
.OD = 0x0000, .PD = 0x0000,
.DRV = 0x0000, .OD = 0x0000,
.LOCK = 0x0000, .DRV = 0x0000,
.OUT = 0x0000, .LOCK = 0x0000,
.CFG[0] = AF_BITS(IOPORTC, 0), .OUT = 0x0000,
.CFG[1] = AF_BITS(IOPORTC, 1), .CFG[0] = AF_BITS(IOPORTC, 0),
}, .CFG[1] = AF_BITS(IOPORTC, 1),
},
// GPIO D // GPIO D
.setup[3] = { .setup[3] =
.DIR = OUT_BITS(IOPORTD), {
.INE = IN_BITS(IOPORTD), .DIR = OUT_BITS(IOPORTD),
.PU = IN_BITS(IOPORTD), .INE = IN_BITS(IOPORTD),
.PD = 0x0000, .PU = IN_BITS(IOPORTD),
.OD = 0x0000, .PD = 0x0000,
.DRV = 0x0000, .OD = 0x0000,
.LOCK = 0x0000, .DRV = 0x0000,
.OUT = 0x0000, .LOCK = 0x0000,
.CFG[0] = AF_BITS(IOPORTD, 0), .OUT = 0x0000,
.CFG[1] = AF_BITS(IOPORTD, 1), .CFG[0] = AF_BITS(IOPORTD, 0),
}, .CFG[1] = AF_BITS(IOPORTD, 1),
},
.ESSR[0] = 0x00000000, .ESSR[0] = 0x00000000,
.ESSR[1] = 0x00000000, .ESSR[1] = 0x00000000,
}; };
const ioline_t row_list[MATRIX_ROWS] = { const ioline_t row_list[MATRIX_ROWS] = {
LINE_ROW1, LINE_ROW1, LINE_ROW2, LINE_ROW3, LINE_ROW4, LINE_ROW5,
LINE_ROW2,
LINE_ROW3,
LINE_ROW4,
LINE_ROW5,
}; };
const ioline_t col_list[MATRIX_COLS] = { const ioline_t col_list[MATRIX_COLS] = {
LINE_COL1, LINE_COL1, LINE_COL2, LINE_COL3, LINE_COL4, LINE_COL5, LINE_COL6, LINE_COL7, LINE_COL8, LINE_COL9, LINE_COL10, LINE_COL11, LINE_COL12, LINE_COL13, LINE_COL14,
LINE_COL2,
LINE_COL3,
LINE_COL4,
LINE_COL5,
LINE_COL6,
LINE_COL7,
LINE_COL8,
LINE_COL9,
LINE_COL10,
LINE_COL11,
LINE_COL12,
LINE_COL13,
LINE_COL14,
}; };
void __early_init(void) { void __early_init(void) {}
ht32_clock_init();
}
void boardInit(void) { void early_hardware_init_pre(void) { ht32_clock_init(); }
}
void board_init(void) {}
void boardInit(void) {}

65
keyboards/annepro2/boards/ANNEPRO2_C15/board.h
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@ -14,8 +14,7 @@
limitations under the License. limitations under the License.
*/ */
#ifndef BOARD_H #pragma once
#define BOARD_H
/* /*
* Setup for Anne Pro 2 board. * Setup for Anne Pro 2 board.
*/ */
@ -24,54 +23,52 @@
* Board identifier. * Board identifier.
*/ */
#define ANNEPRO2 #define ANNEPRO2
#define BOARD_NAME "Anne Pro 2" #define BOARD_NAME "Anne Pro 2"
#define HT32F52342 #define HT32F52342
#define FLASH_SIZE (0x10000 - 0x4000) // 64kB - 16kB #define FLASH_SIZE (0x10000 - 0x4000) // 64kB - 16kB
/* /*
* I/O * I/O
*/ */
#define LINE_UART_TX PAL_LINE(IOPORTB, 0) // Master TX, LED RX #define LINE_UART_TX PAL_LINE(IOPORTB, 0) // Master TX, LED RX
#define LINE_UART_RX PAL_LINE(IOPORTB, 1) // Master RX, LED TX #define LINE_UART_RX PAL_LINE(IOPORTB, 1) // Master RX, LED TX
#define LINE_BT_UART_TX PAL_LINE(IOPORTA, 4) // Master TX, BLE RX #define LINE_BT_UART_TX PAL_LINE(IOPORTA, 4) // Master TX, BLE RX
#define LINE_BT_UART_RX PAL_LINE(IOPORTA, 5) // Master RX, BLE TX #define LINE_BT_UART_RX PAL_LINE(IOPORTA, 5) // Master RX, BLE TX
// outputs (rows are pulled low) // outputs (rows are pulled low)
#define LINE_ROW1 PAL_LINE(IOPORTC, 2) #define LINE_ROW1 PAL_LINE(IOPORTC, 2)
#define LINE_ROW2 PAL_LINE(IOPORTC, 1) #define LINE_ROW2 PAL_LINE(IOPORTC, 1)
#define LINE_ROW3 PAL_LINE(IOPORTB, 5) #define LINE_ROW3 PAL_LINE(IOPORTB, 5)
#define LINE_ROW4 PAL_LINE(IOPORTB, 4) #define LINE_ROW4 PAL_LINE(IOPORTB, 4)
#define LINE_ROW5 PAL_LINE(IOPORTC, 3) #define LINE_ROW5 PAL_LINE(IOPORTC, 3)
// inputs (columns are sampled) // inputs (columns are sampled)
#define LINE_COL1 PAL_LINE(IOPORTC, 4) #define LINE_COL1 PAL_LINE(IOPORTC, 4)
#define LINE_COL2 PAL_LINE(IOPORTC, 5) #define LINE_COL2 PAL_LINE(IOPORTC, 5)
#define LINE_COL3 PAL_LINE(IOPORTB, 10) #define LINE_COL3 PAL_LINE(IOPORTB, 10)
#define LINE_COL4 PAL_LINE(IOPORTB, 11) #define LINE_COL4 PAL_LINE(IOPORTB, 11)
#define LINE_COL5 PAL_LINE(IOPORTC, 0) #define LINE_COL5 PAL_LINE(IOPORTC, 0)
#define LINE_COL6 PAL_LINE(IOPORTA, 15) #define LINE_COL6 PAL_LINE(IOPORTA, 15)
#define LINE_COL7 PAL_LINE(IOPORTA, 8) #define LINE_COL7 PAL_LINE(IOPORTA, 8)
#define LINE_COL8 PAL_LINE(IOPORTA, 10) #define LINE_COL8 PAL_LINE(IOPORTA, 10)
#define LINE_COL9 PAL_LINE(IOPORTA, 11) #define LINE_COL9 PAL_LINE(IOPORTA, 11)
// PORTA 12,13 conflict with SWD // PORTA 12,13 conflict with SWD
#define LINE_COL10 PAL_LINE(IOPORTA, 12) #define LINE_COL10 PAL_LINE(IOPORTA, 12)
#define LINE_COL11 PAL_LINE(IOPORTA, 13) #define LINE_COL11 PAL_LINE(IOPORTA, 13)
#define LINE_COL12 PAL_LINE(IOPORTA, 14) #define LINE_COL12 PAL_LINE(IOPORTA, 14)
#define LINE_COL13 PAL_LINE(IOPORTB, 2) #define LINE_COL13 PAL_LINE(IOPORTB, 2)
#define LINE_COL14 PAL_LINE(IOPORTB, 3) #define LINE_COL14 PAL_LINE(IOPORTB, 3)
#if !defined(_FROM_ASM_) #if !defined(_FROM_ASM_)
#ifdef __cplusplus # ifdef __cplusplus
extern "C" { extern "C" {
#endif # endif
void boardInit(void); void boardInit(void);
#ifdef __cplusplus # ifdef __cplusplus
} }
#endif # endif
#endif /* _FROM_ASM_ */ #endif /* _FROM_ASM_ */
#endif /* BOARD_H */

5
keyboards/annepro2/boards/ANNEPRO2_C18/board.h
View File

@ -14,8 +14,7 @@
limitations under the License. limitations under the License.
*/ */
#ifndef BOARD_H #pragma once
#define BOARD_H
/* /*
* Setup for Anne Pro 2 board. * Setup for Anne Pro 2 board.
*/ */
@ -71,5 +70,3 @@ extern "C" {
} }
#endif #endif
#endif /* _FROM_ASM_ */ #endif /* _FROM_ASM_ */
#endif /* BOARD_H */

4
keyboards/annepro2/c15/config.h
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@ -27,7 +27,3 @@
#define MATRIX_ROWS 5 #define MATRIX_ROWS 5
#define MATRIX_COLS 14 #define MATRIX_COLS 14
// layer size: MATRIX_ROWS * MATRIX_COLS * sizeof(uint16_t) = 144 bytes // layer size: MATRIX_ROWS * MATRIX_COLS * sizeof(uint16_t) = 144 bytes
/* Debounce reduces chatter (unintended double-presses) - set 0 if debouncing is not needed */
#define DEBOUNCE 5

3
keyboards/annepro2/c18/config.h
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@ -28,9 +28,6 @@
#define MATRIX_COLS 14 #define MATRIX_COLS 14
// layer size: MATRIX_ROWS * MATRIX_COLS * sizeof(uint16_t) = 144 bytes // layer size: MATRIX_ROWS * MATRIX_COLS * sizeof(uint16_t) = 144 bytes
/* Debounce reduces chatter (unintended double-presses) - set 0 if debouncing is not needed */
#define DEBOUNCE 5
#if defined(ANNEPRO2_EEPROM) #if defined(ANNEPRO2_EEPROM)
// SPI Config // SPI Config
#define SPI_DRIVER SPID1 #define SPI_DRIVER SPID1

6
keyboards/annepro2/mcuconf.h
View File

@ -13,9 +13,7 @@
See the License for the specific language governing permissions and See the License for the specific language governing permissions and
limitations under the License. limitations under the License.
*/ */
#pragma once
#ifndef _MCUCONF_H_
#define _MCUCONF_H_
#include "nvic.h" #include "nvic.h"
@ -68,4 +66,4 @@
#define HT32_SPI1_IRQ_PRIORITY 9 #define HT32_SPI1_IRQ_PRIORITY 9
#endif #endif
#endif /* _MCUCONF_H_ */

5
keyboards/annepro2/protocol.h
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@ -6,8 +6,7 @@
* shine's clang formatting). * shine's clang formatting).
*/ */
#ifndef PROTOCOL_INCLUDED #pragma once
#define PROTOCOL_INCLUDED
#include <inttypes.h> #include <inttypes.h>
#define PROTOCOL_SD SD0 #define PROTOCOL_SD SD0
@ -110,5 +109,3 @@ extern void protoSilence(protocol_t *proto);
/* Transmit message */ /* Transmit message */
extern void protoTx(uint8_t cmd, const unsigned char *buf, int payloadSize, int retries); extern void protoTx(uint8_t cmd, const unsigned char *buf, int payloadSize, int retries);
#endif