mirror of https://github.com/qmk/qmk_firmware
371 lines
14 KiB
C
371 lines
14 KiB
C
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/*
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LUFA Library
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Copyright (C) Dean Camera, 2017.
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dean [at] fourwalledcubicle [dot] com
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www.lufa-lib.org
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*/
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/*
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Copyright 2017 Dean Camera (dean [at] fourwalledcubicle [dot] com)
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Permission to use, copy, modify, distribute, and sell this
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software and its documentation for any purpose is hereby granted
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without fee, provided that the above copyright notice appear in
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all copies and that both that the copyright notice and this
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permission notice and warranty disclaimer appear in supporting
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documentation, and that the name of the author not be used in
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advertising or publicity pertaining to distribution of the
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software without specific, written prior permission.
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The author disclaims all warranties with regard to this
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software, including all implied warranties of merchantability
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and fitness. In no event shall the author be liable for any
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special, indirect or consequential damages or any damages
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whatsoever resulting from loss of use, data or profits, whether
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in an action of contract, negligence or other tortious action,
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arising out of or in connection with the use or performance of
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this software.
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*/
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/** \file
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*
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* Target-related functions for the ISP Protocol decoder.
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*/
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#include "ISPTarget.h"
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#if defined(ENABLE_ISP_PROTOCOL) || defined(__DOXYGEN__)
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/** List of hardware SPI prescaler masks for possible AVRStudio ISP programming speeds.
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*
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* \hideinitializer
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*/
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static const uint8_t SPIMaskFromSCKDuration[] PROGMEM =
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{
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#if (F_CPU == 8000000)
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SPI_SPEED_FCPU_DIV_2, // AVRStudio = 8MHz SPI, Actual = 4MHz SPI
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SPI_SPEED_FCPU_DIV_2, // AVRStudio = 4MHz SPI, Actual = 4MHz SPI
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SPI_SPEED_FCPU_DIV_4, // AVRStudio = 2MHz SPI, Actual = 2MHz SPI
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SPI_SPEED_FCPU_DIV_8, // AVRStudio = 1MHz SPI, Actual = 1MHz SPI
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SPI_SPEED_FCPU_DIV_16, // AVRStudio = 500KHz SPI, Actual = 500KHz SPI
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SPI_SPEED_FCPU_DIV_32, // AVRStudio = 250KHz SPI, Actual = 250KHz SPI
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SPI_SPEED_FCPU_DIV_64, // AVRStudio = 125KHz SPI, Actual = 125KHz SPI
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#elif (F_CPU == 16000000)
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SPI_SPEED_FCPU_DIV_2, // AVRStudio = 8MHz SPI, Actual = 8MHz SPI
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SPI_SPEED_FCPU_DIV_4, // AVRStudio = 4MHz SPI, Actual = 4MHz SPI
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SPI_SPEED_FCPU_DIV_8, // AVRStudio = 2MHz SPI, Actual = 2MHz SPI
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SPI_SPEED_FCPU_DIV_16, // AVRStudio = 1MHz SPI, Actual = 1MHz SPI
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SPI_SPEED_FCPU_DIV_32, // AVRStudio = 500KHz SPI, Actual = 500KHz SPI
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SPI_SPEED_FCPU_DIV_64, // AVRStudio = 250KHz SPI, Actual = 250KHz SPI
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SPI_SPEED_FCPU_DIV_128 // AVRStudio = 125KHz SPI, Actual = 125KHz SPI
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#else
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#error No SPI prescaler masks for chosen F_CPU speed.
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#endif
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};
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/** Lookup table to convert the slower ISP speeds into a compare value for the software SPI driver.
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*
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* \hideinitializer
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*/
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static const uint16_t TimerCompareFromSCKDuration[] PROGMEM =
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{
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TIMER_COMP(96386), TIMER_COMP(89888), TIMER_COMP(84211), TIMER_COMP(79208), TIMER_COMP(74767),
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TIMER_COMP(70797), TIMER_COMP(67227), TIMER_COMP(64000), TIMER_COMP(61069), TIMER_COMP(58395),
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TIMER_COMP(55945), TIMER_COMP(51613), TIMER_COMP(49690), TIMER_COMP(47905), TIMER_COMP(46243),
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TIMER_COMP(43244), TIMER_COMP(41885), TIMER_COMP(39409), TIMER_COMP(38278), TIMER_COMP(36200),
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TIMER_COMP(34335), TIMER_COMP(32654), TIMER_COMP(31129), TIMER_COMP(29740), TIMER_COMP(28470),
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TIMER_COMP(27304), TIMER_COMP(25724), TIMER_COMP(24768), TIMER_COMP(23461), TIMER_COMP(22285),
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TIMER_COMP(21221), TIMER_COMP(20254), TIMER_COMP(19371), TIMER_COMP(18562), TIMER_COMP(17583),
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TIMER_COMP(16914), TIMER_COMP(16097), TIMER_COMP(15356), TIMER_COMP(14520), TIMER_COMP(13914),
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TIMER_COMP(13224), TIMER_COMP(12599), TIMER_COMP(12031), TIMER_COMP(11511), TIMER_COMP(10944),
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TIMER_COMP(10431), TIMER_COMP(9963), TIMER_COMP(9468), TIMER_COMP(9081), TIMER_COMP(8612),
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TIMER_COMP(8239), TIMER_COMP(7851), TIMER_COMP(7498), TIMER_COMP(7137), TIMER_COMP(6809),
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TIMER_COMP(6478), TIMER_COMP(6178), TIMER_COMP(5879), TIMER_COMP(5607), TIMER_COMP(5359),
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TIMER_COMP(5093), TIMER_COMP(4870), TIMER_COMP(4633), TIMER_COMP(4418), TIMER_COMP(4209),
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TIMER_COMP(4019), TIMER_COMP(3823), TIMER_COMP(3645), TIMER_COMP(3474), TIMER_COMP(3310),
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TIMER_COMP(3161), TIMER_COMP(3011), TIMER_COMP(2869), TIMER_COMP(2734), TIMER_COMP(2611),
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TIMER_COMP(2484), TIMER_COMP(2369), TIMER_COMP(2257), TIMER_COMP(2152), TIMER_COMP(2052),
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TIMER_COMP(1956), TIMER_COMP(1866), TIMER_COMP(1779), TIMER_COMP(1695), TIMER_COMP(1615),
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TIMER_COMP(1539), TIMER_COMP(1468), TIMER_COMP(1398), TIMER_COMP(1333), TIMER_COMP(1271),
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TIMER_COMP(1212), TIMER_COMP(1155), TIMER_COMP(1101), TIMER_COMP(1049), TIMER_COMP(1000),
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TIMER_COMP(953), TIMER_COMP(909), TIMER_COMP(866), TIMER_COMP(826), TIMER_COMP(787),
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TIMER_COMP(750), TIMER_COMP(715), TIMER_COMP(682), TIMER_COMP(650), TIMER_COMP(619),
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TIMER_COMP(590), TIMER_COMP(563), TIMER_COMP(536), TIMER_COMP(511), TIMER_COMP(487),
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TIMER_COMP(465), TIMER_COMP(443), TIMER_COMP(422), TIMER_COMP(402), TIMER_COMP(384),
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TIMER_COMP(366), TIMER_COMP(349), TIMER_COMP(332), TIMER_COMP(317), TIMER_COMP(302),
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TIMER_COMP(288), TIMER_COMP(274), TIMER_COMP(261), TIMER_COMP(249), TIMER_COMP(238),
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TIMER_COMP(226), TIMER_COMP(216), TIMER_COMP(206), TIMER_COMP(196), TIMER_COMP(187),
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TIMER_COMP(178), TIMER_COMP(170), TIMER_COMP(162), TIMER_COMP(154), TIMER_COMP(147),
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TIMER_COMP(140), TIMER_COMP(134), TIMER_COMP(128), TIMER_COMP(122), TIMER_COMP(116),
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TIMER_COMP(111), TIMER_COMP(105), TIMER_COMP(100), TIMER_COMP(95.4), TIMER_COMP(90.9),
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TIMER_COMP(86.6), TIMER_COMP(82.6), TIMER_COMP(78.7), TIMER_COMP(75.0), TIMER_COMP(71.5),
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TIMER_COMP(68.2), TIMER_COMP(65.0), TIMER_COMP(61.9), TIMER_COMP(59.0), TIMER_COMP(56.3),
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TIMER_COMP(53.6), TIMER_COMP(51.1)
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};
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/** Currently selected SPI driver, either hardware (for fast ISP speeds) or software (for slower ISP speeds). */
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bool HardwareSPIMode = true;
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/** Software SPI data register for sending and receiving */
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static volatile uint8_t SoftSPI_Data;
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/** Number of bits left to transfer in the software SPI driver */
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static volatile uint8_t SoftSPI_BitsRemaining;
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/** ISR to handle software SPI transmission and reception */
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ISR(TIMER1_COMPA_vect, ISR_BLOCK)
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{
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/* Check if rising edge (output next bit) or falling edge (read in next bit) */
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if (!(PINB & (1 << 1)))
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{
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if (SoftSPI_Data & (1 << 7))
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PORTB |= (1 << 2);
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else
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PORTB &= ~(1 << 2);
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}
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else
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{
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SoftSPI_Data <<= 1;
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if (!(--SoftSPI_BitsRemaining))
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{
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TCCR1B = 0;
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TIFR1 = (1 << OCF1A);
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}
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if (PINB & (1 << 3))
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SoftSPI_Data |= (1 << 0);
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}
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/* Fast toggle of PORTB.1 via the PIN register (see datasheet) */
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PINB |= (1 << 1);
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}
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/** Initializes the appropriate SPI driver (hardware or software, depending on the selected ISP speed) ready for
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* communication with the attached target.
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*/
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void ISPTarget_EnableTargetISP(void)
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{
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uint8_t SCKDuration = V2Params_GetParameterValue(PARAM_SCK_DURATION);
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if (SCKDuration < sizeof(SPIMaskFromSCKDuration))
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{
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HardwareSPIMode = true;
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SPI_Init(pgm_read_byte(&SPIMaskFromSCKDuration[SCKDuration]) | SPI_ORDER_MSB_FIRST |
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SPI_SCK_LEAD_RISING | SPI_SAMPLE_LEADING | SPI_MODE_MASTER);
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}
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else
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{
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HardwareSPIMode = false;
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DDRB |= ((1 << 1) | (1 << 2));
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PORTB |= ((1 << 0) | (1 << 3));
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ISPTarget_ConfigureSoftwareSPI(SCKDuration);
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}
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}
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/** Shuts down the current selected SPI driver (hardware or software, depending on the selected ISP speed) so that no
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* further communications can occur until the driver is re-initialized.
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*/
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void ISPTarget_DisableTargetISP(void)
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{
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if (HardwareSPIMode)
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{
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SPI_Disable();
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}
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else
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{
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DDRB &= ~((1 << 1) | (1 << 2));
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PORTB &= ~((1 << 0) | (1 << 3));
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/* Must re-enable rescue clock once software ISP has exited, as the timer for the rescue clock is
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* re-purposed for software SPI */
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ISPTarget_ConfigureRescueClock();
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}
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}
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/** Configures the AVR to produce a 4MHz rescue clock out of the OCR1A pin of the AVR, so
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* that it can be fed into the XTAL1 pin of an AVR whose fuses have been mis-configured for
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* an external clock rather than a crystal. When used, the ISP speed must be 125KHz for this
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* functionality to work correctly.
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*/
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void ISPTarget_ConfigureRescueClock(void)
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{
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#if defined(XCK_RESCUE_CLOCK_ENABLE)
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/* Configure XCK as an output for the specified AVR model */
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DDRD |= (1 << 5);
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/* Start USART to generate a 4MHz clock on the XCK pin */
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UBRR1 = ((F_CPU / 2 / ISP_RESCUE_CLOCK_SPEED) - 1);
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UCSR1B = (1 << TXEN1);
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UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);
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#else
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/* Configure OCR1A as an output for the specified AVR model */
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#if defined(USB_SERIES_2_AVR)
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DDRC |= (1 << 6);
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#else
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DDRB |= (1 << 5);
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#endif
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/* Start Timer 1 to generate a 4MHz clock on the OCR1A pin */
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TIMSK1 = 0;
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TCNT1 = 0;
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OCR1A = ((F_CPU / 2 / ISP_RESCUE_CLOCK_SPEED) - 1);
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TCCR1A = (1 << COM1A0);
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TCCR1B = ((1 << WGM12) | (1 << CS10));
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#endif
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}
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/** Configures the AVR's timer ready to produce software SPI for the slower ISP speeds that
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* cannot be obtained when using the AVR's hardware SPI module.
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*
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* \param[in] SCKDuration Duration of the desired software ISP SCK clock
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*/
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void ISPTarget_ConfigureSoftwareSPI(const uint8_t SCKDuration)
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{
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/* Configure Timer 1 for software SPI using the specified SCK duration */
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TIMSK1 = (1 << OCIE1A);
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TCNT1 = 0;
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OCR1A = pgm_read_word(&TimerCompareFromSCKDuration[SCKDuration - sizeof(SPIMaskFromSCKDuration)]);
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TCCR1A = 0;
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TCCR1B = 0;
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}
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/** Sends and receives a single byte of data to and from the attached target via software SPI.
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*
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* \param[in] Byte Byte of data to send to the attached target
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*
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* \return Received byte of data from the attached target
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*/
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uint8_t ISPTarget_TransferSoftSPIByte(const uint8_t Byte)
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{
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SoftSPI_Data = Byte;
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SoftSPI_BitsRemaining = 8;
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/* Set initial MOSI pin state according to the byte to be transferred */
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if (SoftSPI_Data & (1 << 7))
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PORTB |= (1 << 2);
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else
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PORTB &= ~(1 << 2);
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TCNT1 = 0;
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TCCR1B = ((1 << WGM12) | (1 << CS11));
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while (SoftSPI_BitsRemaining && TimeoutTicksRemaining);
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TCCR1B = 0;
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return SoftSPI_Data;
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}
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/** Asserts or deasserts the target's reset line, using the correct polarity as set by the host using a SET PARAM command.
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* When not asserted, the line is tristated so as not to interfere with normal device operation.
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*
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* \param[in] ResetTarget Boolean true when the target should be held in reset, \c false otherwise
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*/
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void ISPTarget_ChangeTargetResetLine(const bool ResetTarget)
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{
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if (ResetTarget)
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{
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AUX_LINE_DDR |= AUX_LINE_MASK;
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if (!(V2Params_GetParameterValue(PARAM_RESET_POLARITY)))
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AUX_LINE_PORT |= AUX_LINE_MASK;
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else
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AUX_LINE_PORT &= ~AUX_LINE_MASK;
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}
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else
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{
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AUX_LINE_DDR &= ~AUX_LINE_MASK;
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AUX_LINE_PORT &= ~AUX_LINE_MASK;
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}
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}
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/** Waits until the target has completed the last operation, by continuously polling the device's
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* BUSY flag until it is cleared, or until the command timeout period has expired.
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*
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* \return V2 Protocol status \ref STATUS_CMD_OK if the no timeout occurred, \ref STATUS_RDY_BSY_TOUT otherwise
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*/
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uint8_t ISPTarget_WaitWhileTargetBusy(void)
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{
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do
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{
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ISPTarget_SendByte(0xF0);
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ISPTarget_SendByte(0x00);
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ISPTarget_SendByte(0x00);
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}
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while ((ISPTarget_ReceiveByte() & 0x01) && TimeoutTicksRemaining);
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return (TimeoutTicksRemaining > 0) ? STATUS_CMD_OK : STATUS_RDY_BSY_TOUT;
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}
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/** Sends a low-level LOAD EXTENDED ADDRESS command to the target, for addressing of memory beyond the
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* 64KB boundary. This sends the command with the correct address as indicated by the current address
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* pointer variable set by the host when a SET ADDRESS command is issued.
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*/
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void ISPTarget_LoadExtendedAddress(void)
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{
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ISPTarget_SendByte(LOAD_EXTENDED_ADDRESS_CMD);
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ISPTarget_SendByte(0x00);
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ISPTarget_SendByte(CurrentAddress >> 16);
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ISPTarget_SendByte(0x00);
|
||
|
|
}
|
||
|
|
|
||
|
|
/** Waits until the last issued target memory programming command has completed, via the check mode given and using
|
||
|
|
* the given parameters.
|
||
|
|
*
|
||
|
|
* \param[in] ProgrammingMode Programming mode used and completion check to use, a mask of \c PROG_MODE_* constants
|
||
|
|
* \param[in] PollAddress Memory address to poll for completion if polling check mode used
|
||
|
|
* \param[in] PollValue Poll value to check against if polling check mode used
|
||
|
|
* \param[in] DelayMS Milliseconds to delay before returning if delay check mode used
|
||
|
|
* \param[in] ReadMemCommand Device low-level READ MEMORY command to send if value check mode used
|
||
|
|
*
|
||
|
|
* \return V2 Protocol status \ref STATUS_CMD_OK if the no timeout occurred, \ref STATUS_RDY_BSY_TOUT or
|
||
|
|
* \ref STATUS_CMD_TOUT otherwise
|
||
|
|
*/
|
||
|
|
uint8_t ISPTarget_WaitForProgComplete(const uint8_t ProgrammingMode,
|
||
|
|
const uint16_t PollAddress,
|
||
|
|
const uint8_t PollValue,
|
||
|
|
const uint8_t DelayMS,
|
||
|
|
const uint8_t ReadMemCommand)
|
||
|
|
{
|
||
|
|
uint8_t ProgrammingStatus = STATUS_CMD_OK;
|
||
|
|
|
||
|
|
/* Determine method of Programming Complete check */
|
||
|
|
switch (ProgrammingMode & ~(PROG_MODE_PAGED_WRITES_MASK | PROG_MODE_COMMIT_PAGE_MASK))
|
||
|
|
{
|
||
|
|
case PROG_MODE_WORD_TIMEDELAY_MASK:
|
||
|
|
case PROG_MODE_PAGED_TIMEDELAY_MASK:
|
||
|
|
ISPProtocol_DelayMS(DelayMS);
|
||
|
|
break;
|
||
|
|
case PROG_MODE_WORD_VALUE_MASK:
|
||
|
|
case PROG_MODE_PAGED_VALUE_MASK:
|
||
|
|
do
|
||
|
|
{
|
||
|
|
ISPTarget_SendByte(ReadMemCommand);
|
||
|
|
ISPTarget_SendByte(PollAddress >> 8);
|
||
|
|
ISPTarget_SendByte(PollAddress & 0xFF);
|
||
|
|
}
|
||
|
|
while ((ISPTarget_TransferByte(0x00) == PollValue) && TimeoutTicksRemaining);
|
||
|
|
|
||
|
|
if (!(TimeoutTicksRemaining))
|
||
|
|
ProgrammingStatus = STATUS_CMD_TOUT;
|
||
|
|
|
||
|
|
break;
|
||
|
|
case PROG_MODE_WORD_READYBUSY_MASK:
|
||
|
|
case PROG_MODE_PAGED_READYBUSY_MASK:
|
||
|
|
ProgrammingStatus = ISPTarget_WaitWhileTargetBusy();
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Program complete - reset timeout */
|
||
|
|
TimeoutTicksRemaining = COMMAND_TIMEOUT_TICKS;
|
||
|
|
|
||
|
|
return ProgrammingStatus;
|
||
|
|
}
|
||
|
|
|
||
|
|
#endif
|
||
|
|
|