qmk_firmware/keyboards/cipulot/ec_tkl/config.h

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2024-04-30 17:36:28 +00:00
/* Copyright 2023 Cipulot
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#define MATRIX_ROWS 6
#define MATRIX_COLS 16
#define MATRIX_ROW_PINS \
{ B6, B5, B12, B10, B13, B7 }
#define AMUX_COUNT 1
#define AMUX_MAX_COLS_COUNT 16
#define AMUX_EN_PINS \
{ A8 }
#define AMUX_SEL_PINS \
{ B14, B15, A9, A10 }
#define AMUX_COL_CHANNELS_SIZES \
{ 16 }
#define AMUX_0_COL_CHANNELS \
{ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}
#define AMUX_COL_CHANNELS AMUX_0_COL_CHANNELS
#define DISCHARGE_PIN A4
#define ANALOG_PORT A2
#define DEFAULT_ACTUATION_MODE 0
#define DEFAULT_MODE_0_ACTUATION_LEVEL 550
#define DEFAULT_MODE_0_RELEASE_LEVEL 500
#define DEFAULT_MODE_1_INITIAL_DEADZONE_OFFSET DEFAULT_MODE_0_ACTUATION_LEVEL
#define DEFAULT_MODE_1_ACTUATION_OFFSET 70
#define DEFAULT_MODE_1_RELEASE_OFFSET 70
#define DEFAULT_EXTREMUM 1023
#define EXPECTED_NOISE_FLOOR 0
#define NOISE_FLOOR_THRESHOLD 50
#define BOTTOMING_CALIBRATION_THRESHOLD 50
#define DEFAULT_NOISE_FLOOR_SAMPLING_COUNT 30
#define DEFAULT_BOTTOMING_READING 1023
#define DEFAULT_CALIBRATION_STARTER true
#define DISCHARGE_TIME 10
// #define DEBUG_MATRIX_SCAN_RATE
#define EECONFIG_KB_DATA_SIZE 201
// PWM driver with direct memory access (DMA) support
#define WS2812_PWM_DRIVER PWMD3
#define WS2812_PWM_CHANNEL 1
#define WS2812_PWM_PAL_MODE 2
#define WS2812_DMA_STREAM STM32_DMA1_STREAM2
#define WS2812_DMA_CHANNEL 5